Commit graph

30760 commits

Author SHA1 Message Date
Lokesh Vutla
37be54fd13 ARM: BeagleBoard-x15: Enable i2c5 clocks
On AM57xx evm I2C5 is used to detect the LCD board by reading the
EEPROM present on the bus.
Enable i2c5 clocks to help that.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-15 10:57:26 -04:00
Tom Rini
0ad5eaa4e5 am43xx_evm: Enable NAND boot
Enable booting from NAND on the am437xx-evm.

Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-15 10:57:26 -04:00
Roger Quadros
cda6017629 am335x_evm: nand: Fix boot from NAND
Use the correct partition names from with the Device Tree blob
and the kernel is picked up. Also use partition name instead of
number for the root filesystem in the kernel boot arguments.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-15 10:57:26 -04:00
Roger Quadros
9ddef489c4 am335x_evm: am44xx_evm: dra7xx_evm: nand: Fix file-system partition name
We almost always use UBIFS for user accessible NAND file systems and
the UBIFS file system might contain more than one volume within the
single NAND partition. The last NAND partition is therefore more
appropriately named as "NAND.file-system" instead of "NAND.rootfs"

The Linux kernel (as of v3.16) also uses "NAND.file-system" to name the
last NAND partition. This patch makes the partition name consistent
between u-boot and the kernel.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-15 10:57:25 -04:00
Roger Quadros
ab16817cfb configs: am43xx_evm: Enable NAND
AM43xx EVMs have NAND so enable it.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-15 10:57:25 -04:00
Mark Langsdorf
ef51c416bc highbank: add custom ahci_link_up function
The Calxeda highbank SOC needs a custom sequence to bring up SATA links,
so override ahci_link_up with custom function to handle combophy setup.

Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Richard Gibbs
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andre Przywara <osp@andrep.de>
2015-06-15 10:57:25 -04:00
Mark Langsdorf
f8b009e8b7 ahci: extend data io wait to 10s
The AHCI driver currently waits 5s before timing out when sending a
data command to a drive. Some drives take upwards of 8s to respond to
the initial data command while they're spinning up. Increase the
data io timeout to 10s so that those drives can be found on initial
scsi scan.

Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Andre Przywara <osp@andrep.de>
2015-06-12 16:53:04 -04:00
Mark Langsdorf
2b42c9317d ahci: support LBA48 data reads for 2+TB drives
Enable full 48-bit LBA48 data reads by passing the upper word of the
LBA block pointer in bytes 9 and 10 of the FIS.

This allows uboot to load data from any arbitrary sector on a drive
with 2 or more TB of available data connected to an AHCI controller.

Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Andre Przywara <osp@andrep.de>
[trini: Make use of CONFIG_SYS_64BIT_LBA in a few places to drop
 warnings on platforms that don't enable that feature ]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-06-12 16:52:32 -04:00
Mark Langsdorf
35df893199 cmd_scsi: use lbaint_t for LBA values instead of u32
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Andre Przywara <osp@andrep.de>
2015-06-12 13:02:07 -04:00
Mark Langsdorf
f8973325d0 ARM: highbank: add reset support for Calxeda Midway machine
The Calxeda Midway part has A15 cores, which do not have the Highbank
A9's SCU used there for resetting the chip.
Add code to distinguish between the A9 and the A15 and invoke the
appropriate register writes to support the newer part.

Andre: rework detection of Highbank vs. Midway
Rob: fix Andre's reworked detection

Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Andre Przywara <osp@andrep.de>
Signed-off-by: Rob Herring <robh@kernel.org>
2015-06-12 13:02:07 -04:00
Rob Herring
083ffd65cb ARM: highbank: add missing SCU register setup for reset
Andre: assign names to the magic values

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andre Przywara <osp@andrep.de>
2015-06-12 13:02:07 -04:00
Lokesh Vutla
8f6c80b966 ARM: BeagleBoard-x15: Add mux data
Adding the mux data, manual and virtual mode
settings for BeagleBoard-X15.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
2015-06-12 13:02:07 -04:00
Lokesh Vutla
f91e0c4c77 ARM: BeagleBoard-x15: Enable IO delay recalibration sequence
Enable IO delay recalibration sequence.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:06 -04:00
Lokesh Vutla
2cb3cccb8b ARM: DRA7: CPSW: Remove IO delay hack
Now all manual mode configurations are done as part of
IO delay recalibration sequence, remove the hack done for
CPSW.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-06-12 13:02:06 -04:00
Nishanth Menon
27d170af17 ARM: DRA7-evm: Add mux data
Adding the mux data, manual and virtual mode
settings for DRA7-evm.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
2015-06-12 13:02:06 -04:00
Lokesh Vutla
706dd34893 ARM: DRA7-evm: Enable IO delay recalibration sequence
Enabling IO delay recalibration sequence for DRA7 EVM.
UART and I2C are configured before IO delay recalibration sequence
as these are used earlier and safe to use.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:06 -04:00
Lokesh Vutla
71bed1855f ARM: DRA7: Add support for manual mode configuration
In addition to the regular mux configuration, certain pins of DRA7
require to have "manual mode" also programmed, when predefined
delay characteristics cannot be used for the interface.

struct iodelay_cfg_entry is introduced for populating
manual mode IO timings.
For configuring manual mode, along with the normal pad
configuration do the following steps:
- Select MODESELECT field of each assocaited PAD.
  CTRL_CORE_PAD_XXX[8]:MODESELECT = 1(Enable MANUAL_MODE macro along with mux)
- Populate A_DELAY, G_DELAY values that are specified in DATA MANUAL.
  And pass the offset of the CFG_XXX register in iodelay_cfg_entry.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:05 -04:00
Lokesh Vutla
eda6fbcc8c ARM: DRA7: Add support for IO delay configuration
On DRA7, in addition to the regular muxing of pins, an additional
hardware module called IODelay which is also expected to be
configured. This "IODelay" module has it's own register space that is
independent of the control module.

It is advocated strongly in TI's official documentation considering
the existing design of the DRA7 family of processors during mux or
IODelay recalibration, there is a potential for a significant glitch
which may cause functional impairment to certain hardware. It is
hence recommended to do muxing as part of IOdelay recalibration.

IODELAY recalibration sequence:
- Complete AVS voltage change on VDD_CORE_L
- Unlock IODLAY config registers.
- Perform IO delay calibration with predefined values.
- Isolate all the IOs
- Update the delay mechanism for each IO with new calibrated values.
- Configure PAD configuration registers
- De-isolate all the IOs.
- Relock IODELAY config registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:05 -04:00
Lokesh Vutla
61d383d0f7 ARM: DRA7: Add support for virtual mode configuration
In addition to the regular mux configuration, certain pins of DRA7
require to have "virtual mode" also programmed.
This allows for predefined delay characteristics to be used by the SoC
to meet timing characterstics needed for the interface.

Provide easy to use macro to do the same.

For configuring virtual mode, along with normal pad configuration add
the following two steps:
- Select MODESELECT field of each assocaited PAD.
  CTRL_CORE_PAD_XXX[8]:MODESELECT = 1
- DELAYMODE filed should be configured with value given in DATA Manual.
  CTRL_CORE_PAD_XXX[7:4]:DELAYMODE =[0-15] (as given in DATA manual).

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:05 -04:00
Lokesh Vutla
6ae4c3efbd ARM: DRA7: Add pinctrl register definitions
Adopting the pinctrl register definitions from Linux kernel
to be consistent.
Old definitions will be removed once all the pinctrl data
is adapted to new definitions.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:05 -04:00
Lokesh Vutla
1f68451ca0 ARM: DRA7: Make do_set_mux32() generic
do_set_mux32() is redefined in dra7xx and beagle_x15 boards.
IO delay recalibration sequence also needs this.
Making it generic to avoid duplication.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:05 -04:00
Lokesh Vutla
ee4dc2590f ARM: DRA7xx: EMIF: Fix DLL_CALIB_CTRL register
When DLL_CALIB_INTERVAL is set, an extra delay is added
which is not required and it consumes EMIF bandwidth.
So making the DLL_CALIB_CTRL[8:0]DLL_CALIB_INTERVAL bits to 0.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-06-12 12:43:07 -04:00
Lokesh Vutla
536d874708 ARM: DRA7: Update DDR IO registers
Update DDR IO register values.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-12 12:43:07 -04:00
Lokesh Vutla
a5c5c5b500 ARM: DRA7: Update DDR IO configuration
DDRIO_2 and LPDDR2CH1_1 registers are not present
for DRA7. So not configuring these registers for DRA7xx

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-12 12:43:06 -04:00
Lokesh Vutla
c7400e4882 ARM: DRA7: Add is_dra72x cpu check definition
A generic is_dra72x cpu check is useful for grouping
all the revisions under that. This is used in the
subsequent patches.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-12 12:43:06 -04:00
Lokesh Vutla
f308b4fce5 ARM: DRA72-evm: Enable HW leveling
Updating EMIF registers to enable HW leveling
on DRA72-evm.
Also updating the timing registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-12 12:43:06 -04:00
Lokesh Vutla
920638fa5e ARM: DRA7-evm: Enable HW leveling
Updating EMIF registers to enable HW leveling
on DRA7-evm.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-12 12:43:06 -04:00
Lokesh Vutla
496edffdb2 ARM: BeagleBoard-X15: Enable HW leveling
Updating EMIF registers to enable HW leveling
on BeagleBoard-X15.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-12 12:43:06 -04:00
Lokesh Vutla
6213db78f4 ARM: DRA7: DDR3: Add support for HW leveling
DRA7 EMIF supports Full leveling for DDR3.
Adding support for the Full leveling sequence.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-06-12 12:43:06 -04:00
Masahiro Yamada
9d01b7872e kconfiglib: sync with the latest in Kconfiglib project
This commit imports some updates of kconfiglib.py from
https://github.com/ulfalizer/Kconfiglib

 - Warn about and ignore the "allnoconfig_y" Kconfig option
 - Statements in choices inherit menu/if deps
 - Add Symbol.is_allnoconfig_y()
 - Hint that modules are still supported despite warnings.
 - Add warning related to get_defconfig_filename().
 - Fix typo in docs.
 - Allow digits in $-references to symbols.

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Philip Craig <philipjcraig@gmail.com>
Signed-off-by: Jakub Sitnicki <jsitnicki@gmail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-06-12 12:43:06 -04:00
Pali Rohár
64d16706a0 Nokia RX-51: Fix calculating return address in save_boot_params
Commit e11c6c279d broke calculating lr register
in function save_boot_params() and caused U-Boot to crash at early boot time
on Nokia N900 board.

This patch fix calculating return address in lr register and make Nokia N900
board bootable again. Patch was tested in qemu and also on real N900 HW.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
2015-06-12 08:11:18 -04:00
Tom Rini
b9130d88fa Merge git://git.denx.de/u-boot-dm 2015-06-11 21:18:52 -04:00
Hannes Schmelzer
7bb7d672aa common/cmd_bdinfo: show gd->board_type
sometimes it is usefull to know if board-detection has
written the correct value into gd->board_type.

For this we add some output to the bdinfo command.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2015-06-11 08:29:14 -04:00
Masahiro Yamada
3850dbe833 blackfin: fix undefined reference to srand and rand
Commit 9ba9e85f3f (net: Fix NET_RANDOM_ETHADDR dependencies)
accidentally dropped CONFIG_LIB_RAND defines for 14 Blackfin boards.

Prior to that commit, those boards defined CONFIG_LIB_RAND, but not
CONFIG_NET_RANDOM_ETHADDR.  So, commit 9ba9e85f3f should not have
touched them, but in fact it ripped CONFIG_LIB_RAND off from all the
header files, which caused undefined reference to srand and rand.
CONFIG_LIB_RAND=y must be revived for such boards.

BTW, this commit indeed makes it better, but even with this fix,
three boards (bf533-stamp, bf538f-ezkit, cm-bf548) still can not
build due to region 'ram' overflowed error.  This was cause by
commit 6eed3786c6 (net: Move the CMD_NET config to defconfigs)
because CMD_NET selects NET, and NET selects REGEX.  Eventually,
some boards were newly enabled with CONFIG_REGEX, increasing the
memory footprint.  A patch is expected to fix the build error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-06-11 08:28:35 -04:00
Masahiro Yamada
0592115d47 README.scrapyard: add entries for dead AVR32 boards
Some AVR32 boards were dropped by the following commits:
 9eb45aabe0 (avr32: delete non generic board favr-32-ezkit)
 e369307644 (avr32: delete non generic board hammerhead)
 c62d2f8fc5 (avr32: delete non generic board mimc200)
 e5354b8a9e (avr32: delete non generic board's atstk100{3, 4, 6})

Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-06-11 08:27:26 -04:00
Tom Rini
815f574fcf Merge branch 'master' of http://git.denx.de/u-boot-samsung 2015-06-10 21:45:51 -04:00
Simon Glass
257bfd2e21 dm: usb: tegra: Drop legacy USB code
Drop the code that doesn't use driver model for USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
af28224546 sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig
Move this over to Kconfig and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
a59abd1049 Remove SPL undefine of CONFIG_OF_CONTROL
Allow SPL to be built with this option so that we can support device tree
control. Disable the simple bus for now in SPL. It may be needed later.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
b6bfb6ff9a Add a simple version of memalign()
This is used when the full malloc() is not available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
e9fc058314 dm: serial: Don't support CONFIG_CONS_INDEX with device tree
This feature should be deprecated for new boards, and significantly adds
to SPL code size. Drop it. Instead, we can use stdout-path in the /chosen
node.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
47a785a9dd dts: Disable device tree for SPL on all boards
We plan to enable device tree in SPL by default. Before doing this,
explicitly disable it for all boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
b65d5209b3 fdt: arm: Drop device tree padding
The 4KB padding doesn't seem necessary since we don't normally adjust the
control device tree file within U-Boot. Also drop the memory table space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
9091400859 dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model
This option is used by some boards, so support it with driver model. This
is really ugly - we should rewrite this driver once all users are moved to
driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
8d379f179a lcd: Support colour lookup table on 16bpp display in BMP images
For 16-bit-per-pixel displays it is useful to support 8 bit-per-pixel
images to reduce image size. Add support for this when drawing BMP images.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:55 -06:00
Simon Glass
1c3dbe56f7 Remove typedefs from bmp_layout.h
We try to avoid typedefs and these ones are easy enough to remove. Before
changing this header in the next patch, remove the typedefs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-06-10 19:26:54 -06:00
Simon Glass
29748515fd sandbox: Add an implementation for cleanup_before_linux_select()
Support this function so we can use Chrome OS verified boot with sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:54 -06:00
Simon Glass
4d24a11ee6 arm: Allow cleanup_before_linux() without disabling caches
This function is used before jumping to U-Boot, but in that case we don't
always want to disable caches.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
2015-06-10 19:26:54 -06:00
Simon Glass
32ba8952cb arm: spl: Add an API to detect when U-Boot is started from SPL
For secure boot systems it is common to have a read-only U-Boot which starts
the machine and jumps to a read-write U-Boot for actual booting the OS. This
allows the read-write U-Boot to be upgraded without risk of permanently
bricking the machine. In the event that the read-write U-Boot is corrupted,
the read-only U-Boot can detect this with a checksum and boot into a
recovery flow.

To support this, add a way to detect when U-Boot is run from SPL as opposed
to some other method, such as booted directly (no SPL) or started from
another source (e.g. a primary U-Boot). This works by putting a special value
in r0.

For now we rely on board-specific code to actually check the register and
set a flag. At some point this could be generalised, perhaps by using a spare
register and passing a flag to _main and/or board_init_f().

This commit does not implement any feature, but merely provides the API for
boards to implement.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:54 -06:00
Simon Glass
0c5dd9ae2f dm: usb: Implement usb_detect_change() for driver model
Support this function with driver model also (CONFIG_DM_USB).

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-06-10 19:26:54 -06:00