Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-03-17 15:27:00 +00:00
Code Issues Projects Releases Packages Wiki Activity

ARM: DRA7: Update DDR IO configuration

Browse source 
DDRIO_2 and LPDDR2CH1_1 registers are not present
for DRA7. So not configuring these registers for DRA7xx

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Lokesh Vutla 2015-06-03 14:43:26 +05:30 • committed by Tom Rini
parent c7400e4882
commit a5c5c5b500
1 changed files with 8 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
arch/arm/cpu/armv7/omap5/hwinit.c
View file

@ -75,16 +75,20 @@ static void io_settings_ddr3(void)
writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0);
writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1);
writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2);
if (!is_dra7xx()) {
writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2);
writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1);
}
/* omap5432 does not use lpddr2 */
writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0);
writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1);
writel(ioregs->ctrl_emif_sdram_config_ext,
(*ctrl)->control_emif1_sdram_config_ext);
writel(ioregs->ctrl_emif_sdram_config_ext,
(*ctrl)->control_emif2_sdram_config_ext);
if (!is_dra72x())
writel(ioregs->ctrl_emif_sdram_config_ext,
(*ctrl)->control_emif2_sdram_config_ext);
if (is_omap54xx()) {
/* Disable DLL select */