Add function to send mailbox command via SMC to get usercode from SDM.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Remove unused SMC function ID 61 and 62.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
In preparation to add SiFive Unmatched board support, let's rename
the existing fu540 board to unleashed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This define was left over from a previous revision, and was never used.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
In i.MX8M platforms the secure memory block has a newer version
than those used in i.MX6/7 platforms, this patch update the driver
to use the correct registers offsets.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enabling CAAM driver for i.MX8M platforms, a 64 bits architecture,
lead to casting warnings: from/to pointer to/from integer with
different size. This patch fix these warnings
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
U-Boot can instantiate CAAM RNG if needed by crypto operations.
Call sec_init() prior running a blob operation to ensure
RNG is correctly instantiated.
Make sure CAAM clock is enabled and check if a job ring is
available for that operation.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This code was originally developed by Raul Cardenas <raul.casas@nxp.com>
and modified to be applied in U-Boot imx_v2017.03.
More information about the initial submission can be seen
in the link below:
https://lists.denx.de/pipermail/u-boot/2016-February/245273.html
i.MX7D has an a protection feature for Manufacturing process.
This feature uses asymmetric encryption to sign and verify
authenticated software handled between parties. This command
enables the use of such feature.
The private key is unique and generated once per device.
And it is stored in secure memory and only accessible by CAAM.
Therefore, the public key generation and signature functions
are the only functions available for the user.
The manufacturing-protection authentication process can be used to
authenticate the chip to the OEM's server.
Command usage:
Print the public key for the device.
- mfgprot pubk
Generates Signature over given data.
- mfgprot sign <data_address> <data_size>
Signed-off-by: Raul Ulises Cardenas <raul.casas@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Currently PCA9450 might have address 0x25 or 0x35, so let user
choose the address.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This is a straightforward conversion of the old, non-dm driver. It was
done in-place as the deadline for non-dm MMC has passed. Previous
commits ensured that no board depends on the old, non-dm variant. Tested
on a Kirkwood based board with eMMC.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
Tested-by: Harm Berntsen <harm.berntsen@nedap.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
CC: Pantelis Antoniou <panto@antoniou-consulting.com>
CC: Stefan Roese <sr@denx.de>
CC: Gerald Kerma <drEagle@doukki.net>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This will be replaced with the driver model version
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
CC: Stefan Roese <sr@denx.de>
CC: Tom Rini <trini@konsulko.com>
Unfortunately this board has no DM support at all. We are also way past
the deadline for driver model support for various devices on this board.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CC: Stefan Roese <sr@denx.de>
These boards use an MMC driver that does not use this definition
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CC: Stefan Roese <sr@denx.de>
CC: Mario Six <mario.six@gdsys.cc>
CC: Dennis Gilmore <dgilmore@redhat.com>
Call 'run update_uboot' to fetch u-boot-spl.kwb via TFTP and write it
into the correct SPI flash location. The latter's size is defined in
DS414's DTB file, so hard-coding it should be acceptable here.
Take care to not append garbage from RAM to the written image and to
stay within assigned flash boundaries even if an oversized image was
fetched.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Move the relevant bits from ds109.{c,h} into common/ and adjust the code
to fit both DS109 and DS414. Moreover:
* Introduce syno_board_id() which translates CONFIG_MACH_TYPE into the
expected board ID tag value.
* Properly initialize isusbhost, mac and mtu fields from env variables.
* Set the right bootargs/bootcmd to correctly boot legacy kernel out of
the (DS414) box. Getting the ramdisk location right is a bit tedious.
Cc: Walter Schweizer <swwa@users.sourceforge.net>
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Update hwpartition usage
Check bootbus's arguments
workaround for erratum A-011334 for fsl_esdhc driver
add pulse width detection workaround for fsl_esdhc driver
Use alias num before checking mmc index when creating device
Minor dtoc improvements
Convert CONFIG_MISC_INIT_F to Kconfig
Allow unit tests to run on any board
pylibfdt build-rule fix
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Merge tag 'dm-pull-6apr21' of https://source.denx.de/u-boot/custodians/u-boot-dm
ENOSYS clean-up
Minor dtoc improvements
Convert CONFIG_MISC_INIT_F to Kconfig
Allow unit tests to run on any board
pylibfdt build-rule fix
HS400 mode on the LS1028A SoC isn't reliable. The linux driver has a
workaroung for the pulse width detection. Apply this workaround in
u-boot, too.
This will make HS400 mode work reliably on the LS1028A SoC.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
We had a problem detecting 8/16bit flash devices connected only via
8bits to the SoC for quite a while. Commit 239cb9d9
[mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support] finally
fixed this 8-bit bus support. But also broke some other boards using
this cfi driver. So this patch had to be reverted.
I spotted a different, simpler approach for this 8-bit bus support
on the barebox mailing list posted by
Oleksij Rempel <bug-track@fisher-privat.net>:
http://www.spinics.net/lists/u-boot-v2/msg14687.html
Here the commit text:
"
Many cfi chips support 16 and 8 bit modes. Most important
difference is use of so called "Q15/A-1" pin. In 16bit mode this
pin is used for data IO. In 8bit mode, it is an address input
which add one more least significant bit (LSB). In this case
we should shift all adresses by one:
For example 0xaa << 1 = 0x154
"
This patch now is a port of this barebox patch to U-Boot.
Along with the change w.r.t from barebox,
Some flash chips can support multiple bus widths, override the
interface width and limit it to the port width.
Tested on 16-bit Spansion flash on sequoia.
Tested 8-bit flashes like 256M29EW, 512M29EW.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: York Sun <york.sun@nxp.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Due to a recent change, tests are limited to running on sandbox only.
Correct this so that any architecture can run them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Sean Anderson <seanga2@gmail.com>
Fixes: c79705ea93 ("test: Move dm_test_init() into test-main.c")
Tested-by: Sean Anderson <seanga2@gmail.com>
Avoid 'make htmldocs' build warnings:
./include/os.h:139: warning:
Function parameter or member 'ptr' not described in 'os_realloc'
./include/os.h:139: warning:
Function parameter or member 'length' not described in 'os_realloc'
Fixes: 14e46dfb17 ("sandbox: Add os_realloc()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present debug() statements can cause debuf output to appear when LOG is
enabled but DEBUG is not. This is not intended and it seems that the
condition is wrong.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently it is not possible to boot Linux from the SD card
by default.
Make the necessary adjustments to allow it.
Reported-by: Peter Bergin <peter@berginkonsult.se>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrey Zhizhikin <andrey.z@gmail.com> # imx8mn_ddr4_evk
Reviewed-by: Peng Fan <peng.fan@nxp.com>
There are several changes which happen in mainline kernel which should get
also to U-Boot. Here is the list of patches from the kernel:
- ARM: zynq: Fix leds subnode name for zc702/zybo-z7
- arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
- arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111
- arm64: dts: zynqmp: Wire up the DisplayPort subsystem
- arm64: dts: zynqmp: Add DisplayPort subsystem
- arm64: dts: zynqmp: Add DPDMA node
- arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106
- arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
- arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106
- arm64: dts: zynqmp-zcu100-revC: correct interrupt flags
- arm64: dts: xilinx: align GPIO hog names with dtschema
- arm64: zynqmp: Add Xilinx AES node
- dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA
but also some other changes have been done.
- Using only one compatible string for adxl345 on zturn
- Remove Xilinx internal DP bindings
- Remove USB3.0 serdes configurations
- Remove SATA serdes configuration for zc1232
- Resort nvmem_firmware
- Update nand compatible string
- Aling power-domains property for sd0/1
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Drop a irrelevent comment now the related configs have moved
to the various config files.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This is the state as of v5.10 in Linux.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so
that regular kernel images can get loaded without problems.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB
behind the area where we load u-boot to, which depending on u-boot size
may overlap at some point.
So for safety just pick the same value rk3399 has and set
CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When including this file on a board other than sandbox (e.g by enabling
UNIT_TEST and CMD_SETEXPR) an results. Fix it by declaring struct udevice
first.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some boards may want to show the SKU ID or other information obtained at
runtime. Allow this to come from sysinfo. The board can then provide a
sysinfo driver to provide it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The U_BOOT_CMDREP_COMPLETE() macro produces a build error if CONFIG_CMDLINE
is not enabled. Fix this by updating the macro to provide the 'repeatable'
arugment in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
This feature was dropped from U-Boot some time ago:
f12f96cfaf (sf: Drop spl_flash_get_sw_write_prot")
However, we do need a way to see if a flash device is write-protected,
since if it is, it may not be possible to write to do (i.e. failing to
write is expected).
I am not sure of the correct layer to implement this, so this patch is a
stab at it. If spi-flash makes sense then I will add to the 'sf' also.
Re the points mentioned in the removal commit:
1) This kind of requirement can be achieved using existing
flash operations and flash locking API calls instead of
making a separate flash API.
Which uclass is this?
2) Technically there is no real hardware user for this API to
use in the source tree.
I do want coral (at least) to support this.
3) Having a flash operations API for simple register read bits
also make difficult to extend the flash operations.
This new patch only mentions write-protect being on or off, rather than
the actual mechanism.
4) Instead of touching generic code, it is possible to have
this functionality inside spinor operations in the form of
flash hooks or fixups for associated flash chips.
That sounds to me like what drivers are for. But we still need some sort
of API for it to be accessible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sandbox is special in that it is used for testing and it does not match
any particular target architecture. Allow it to load an image from any
architecture, so that 'bootm' can be used as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when a file is bound to a host device it is always marked as
removeable. Arguably the device is removeable, since it can be unbound at
will. However while it is bound, it is not considered removable by the
user. Also it is useful to be able to model both fixed and removeable
devices for code that distinguishes them.
Add a -r flag to the 'host bind' command and plumb it through to provide
this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow referencing a CBFS file in the flashmap, so that it is possible to
boot from coreboot, where files are not available from binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
CBFS now supports compressed filed. Add support for reading this
information so that the correct decompression can be applied. The
decompression itself is not implemented in CBFS.
Signed-off-by: Simon Glass <sjg@chromium.org>
