Commit graph

47182 commits

Author SHA1 Message Date
Qianyu Gong
caa6e9b03a armv8: fsl-layerscape: spl: remove BSS clearing and board_init_r
As per the top level U-Boot README "Board Initialisation Flow"
section, board_init_f() should return without calling board_init_r()
directly. Clearing BSS and calling board_init_r() will be done in
crt0_64.S.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:10:22 -07:00
Shaohui Xie
a8c9d66c64 armv8: fsl-layerscape: add define CONFIG_STANDALONE_LOAD_ADDR for standalone app
The CONFIG_STANDALONE_LOAD_ADDR is set to 0x80300000 by default.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:10:11 -07:00
Mingkai Hu
13f7988067 armv8: fsl-layerscape: Increase L2 Data RAM latency and L2 Tag RAM latency
According to design specification, the L2 cache operates at the same
frequency as the A72 CPUs in the cluster with a 3-cycle latency, so
increase the L2 Data RAM and Tag RAM latency to 3 cycles, or else,
will run into different call trace issues.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:10:02 -07:00
Shaohui Xie
9578c4273d Export memset for standalone AQ FW load apps
The 'commit 9527931507 ("board/ls2085rdb: Export functions for
standalone AQ FW load apps")' mentioned memset was exported but
it was not, this patch exports the memset.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:09:50 -07:00
Shaohui Xie
2f0dcf2dfa ddr: fsl: fix a compile issue
When CONFIG_SYS_FSL_ERRATUM_A009801 is defined but
CONFIG_SYS_FSL_ERRATUM_A008511 not defined, there is compile error
that temp32 undeclared, this patch fixes it.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:09:22 -07:00
Shengzhou Liu
b9e745bbe2 driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a
This general MMDC driver adds basic support for Freescale MMDC
(Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8
LS1012A SoC for DDR3L, there will be a update to this driver to
support more flexible configuration if new features (DDR4, multiple
controllers/chip selections, etc) are implimented in future.

Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/
LS1012AFRDM.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:08:22 -07:00
Shengzhou Liu
93a6d3284c armv7:ls1021a: Enable workaround for DDR erratum A-009942
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:08:15 -07:00
Hongbo Zhang
214ffae02d nxp: ls102xa: add LS1 PSCI system suspend
The deep sleep function of LS1 platform, is mapped into PSCI system
suspend function, this patch adds implementation of it.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:08:04 -07:00
Hongbo Zhang
d7b006393e nxp: ls102xa: add EPU Finite State Machine
The EPU Finite State Machie (FSM) is used in both the last stage of
system suspend and the earliest stage of system resume.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:51 -07:00
Hongbo Zhang
349cfc973f nxp: ls102xa: add registers definition for system sleep
This patch adds definitions of all the regesters necessary for
system sleep.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:35 -07:00
Hongbo Zhang
d38def1f34 armv7: psci: make v7_flush_dcache_all public for all psci code
The v7_flush_dcache_all function will be called by ls102xa platform system
suspend, it is necessary to make it a public call instead of a local one, but
changing the LENTRY to ENTRY isn't enough, because there is another one using
the same name, so this one gets a psci_ prefix.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:29 -07:00
York Sun
b63a950629 armv8: ls2080a: Remove debug server support
Debug server feature has been dropped from roadmap.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:19 -07:00
Hou Zhiqiang
b392a6d4b0 fsl-layerscape: Add workaround for PCIe erratum A010315
As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:13 -07:00
Hou Zhiqiang
664b652058 fsl: csu: add an API to set R/W permission to PCIe
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:08 -07:00
Hou Zhiqiang
c37fdbdbb0 fsl: csu: add an API to set individual device access permission
Add this API to make the individual device is able to be set to
the specified permission.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:07:02 -07:00
Hou Zhiqiang
341238fd13 arm: fsl-layerscape: move forward the non-secure access permission setup
Move forward the basic non-secure access enable operation, so the
subsequent individual device access permission can override it.
And collect the dispersed callers in board level, and then move
them to SoC level.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:06:56 -07:00
Hou Zhiqiang
71fe22256c fsl: serdes: ensure accessing the initialized maps of serdes protocol
Up to now, the function is_serdes_configed() doesn't check if the map
of serdes protocol is initialized before accessing it. The function
is_serdes_configed() will get wrong result when it was called before
the serdes protocol maps initialized. As the first element of the map
isn't used for any device, so use it as the flag to indicate if the
map has been initialized.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:06:49 -07:00
Sumit Garg
07806e6229 ls1043ardb: PPA: add PPA validation in case of secure boot
As part of Secure Boot Chain of trust, PPA image must be validated
before the image is started.
The code for the same has been added.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:06:39 -07:00
Sumit Garg
285c74811e board: ls1043ardb: move sec_init to board_init
sec_init() which was earlier called in misc_init_r()
is now done in board_init() before PPA init as SEC
block will be used during PPA image validation.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:06:23 -07:00
York Sun
4baa38c51a driver/ddr/fsl: Revise workaround A008511 for A009803
DDR controller 5.2.1 has this erratum A008511 partially fixed.
The workaround needs to be adjusted to take advantage of Vref
training. This patch enables the training and force output
enable to be off.

Erratum A009803 requires the controller to be idel before enabling
address parity. It was combined with workaround for A008511. With
new A008511 flow, this flow needs to be changed to enabling
data init (D_INIT) after the address parity is enabled.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2016-09-14 14:05:38 -07:00
York Sun
b406731aa9 driver/ddr/fsl: Add more debug registers
32 more debug registers are added for newer DDR controllers.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2016-09-14 14:05:32 -07:00
Shengzhou Liu
1a87c24fe8 armv8: fsl-layerscape: Update ddr erratum a008336
DDR erratum A008336 only applies to DDR controller v5.2.0.
DDR controller v5.2.1 already has default 0x43b30002 in
EDDRTQCR1 register for optimal performance.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:05:20 -07:00
Qianyu Gong
77b571da3b net: fm: fix spi flash probe for using driver model
The current code would always use the speed and mode set by
CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE. But if using
SPI driver model it should get the values from DT.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:04:56 -07:00
Masahiro Yamada
b291671232 ARM: uniphier: merge board init functions into board_init()
Currently, the UniPhier platform calls several init functions in the
following order:

  [1] spl_board_init()
  [2] board_early_init_f()
  [3] board_init()
  [4] board_early_init_r()
  [5] board_late_init()

The serial console is not ready at the point of [2], so we want to
avoid using [2] from the view point of debuggability.  Fortunately,
all of the initialization in [2] can be delayed until [3].  I see no
good reason to split into [3] and [4].  So, merge [2] through [4].

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:20 +09:00
Masahiro Yamada
43a8cc905d ARM: uniphier: use checkboard() instead of misc_init_f()
We can use checkboard() stub to show additional board information,
so misc_init_f() should not be used for this purpose.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
3756fe2a2c ARM: uniphier: remove IECTRL setup code of LD4 SoC
This should be handled by the pinctrl driver.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
cdc7e3cb32 pinctrl: uniphier: move register base macros from header to .c file
These macros are only referenced in pinctrl-uniphier-core.c, so
they need not reside in a header file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
865a39a23f pinctrl: uniphier: add System Bus pin-mux settings
This is needed to get access to UniPhier System Bus (external bus).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
14f4723466 mmc: uniphier-sd: migrate to CONFIG_BLK
This is the state-of-the-art MMC driver implementation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
375241f39b ARM: uniphier: enable Generic EHCI driver for Pro4 SoC
This SoC is equipped with two EHCI cores and two xHCI cores.
Enable the generic EHCI driver for the former.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
025b62f303 ARM: uniphier: delete unnecessary xHCI pin-mux settings
These ad-hoc pinmux settings were used for the legacy xHCI driver,
which has gone now.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
47a79f657e usb: uniphier: remove UniPhier xHCI driver and select DM_USB
This driver has not been converted to Driver Model, and it is an
obstacle to migrate other block device drivers.  Remove it for now.

The UniPhier SoCs already use a DM-based EHCI driver, so now
ARCH_UNIPHIER can select DM_USB.

These two changes must be done atomically because removing the
legacy driver causes a build error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2016-09-14 22:54:19 +09:00
Masahiro Yamada
b5550e496e ARM: uniphier: sort select:s alphabetically
ARCH_UNIPHIER is having more and more select:s.  Sort them in case
a select is accidentally duplicated.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-14 22:54:19 +09:00
Wenyou Yang
76062b9cdb i2c: at91_i2c: Fix the wrong include file
Since the 'clk_client.h' doesn't exist, it should be 'clk.h'.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-13 06:58:54 +02:00
John Keeping
21d4b7d4e1 rockchip: i2c: fix >32 byte writes
The special handling of the chip address and register address must only
happen before we send the data buffer, otherwise we will end up
inserting both of these every 32 bytes.

Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-09-13 06:57:27 +02:00
John Keeping
551288bd8b rockchip: i2c: move register write out of inner loop
There is no point in writing intermediate values to the txdata
registers.

Also add padding to the debug logging to make it easier to read when
there are leading zeroes.

Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-09-13 06:57:16 +02:00
John Keeping
80333fd85c rockchip: i2c: use named constant when appropriate
Make it clear that we are using the same value in two adjacent lines.

Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-09-13 06:57:05 +02:00
Tom Rini
8cbb389bb3 Prepare v2016.09
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-12 10:05:51 -04:00
Cyrille Pitchen
d6e9141fc2 sf: fix sf probe
This patch fixes the "sf probe" command. The very first SPI flash probe
passes, for instance when u-boot tries to read its environment settings
from a (Q)SPI memory but next "sf probe" commands fail because the flash
memory node is unbound from the SPI controller children nodes.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-12 08:44:54 -04:00
Heiko Schocher
9dd1d0aa4e common, kconfig: move VERSION_VARIABLE to Kconfig
move VERSION_VARIABLE from board config file into a
Kconfig option.

Signed-off-by: Heiko Schocher <hs@denx.de>
2016-09-09 18:14:18 -04:00
Tom Rini
12f05678e1 Merge branch 'master' of git://git.denx.de/u-boot-net 2016-09-09 15:53:15 -04:00
Tom Rini
aca9814dc5 cmd: Rework disk.c usage
We only need the function found in cmd/disk.c when we have IDE, SCSI or
USB_STORAGE enabled.  While the first two are easy to get right, in the
3rd case we assume that the set of cases where we do have USB and do not
enable USB_STORAGE are small enough that we can take the small bloat of
un-discarded strings on gcc prior to 6.x

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-09 15:53:14 -04:00
Tom Rini
645176d1d5 configs: Migrate CONFIG_USB_STORAGE
In some cases we were missing CONFIG_USB=y so enable that when needed.

Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-09 14:59:35 -04:00
Joshua Scott
41d1258ace net: asix: Fix AX88772B when used with DriverModel
A previous patch (net: asix: fix operation without eeprom) added a
two-byte shift to the packet buffer when receiving a packet on the
AX88772B.

This shift was not included when the driver was updated to work with
DriverModel. Testing on a Marvell DB-88F6820-ACM showed that the adapter
was not functioning correctly (EHCI timeouts).

This patch brings the two-byte shift to the DriverModel implementation
of ops->recv (asix_eth_recv).

Testing on the same board, we were able to TFTP a file over and confirm
that the crc32 was correct.

Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-09-09 13:13:42 -05:00
Joe Hershberger
11e8ec96dc Revert "net: nfs: Correct the reply data buffer size"
This reverts commit 6279b49e6c.

This caused a bad data crc.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Guillaume GARDET <guillaume.gardet@free.fr>
2016-09-09 13:13:41 -05:00
Joe Hershberger
a73588fe48 Revert "net: nfs: Use the tx buffer to construct rpc msgs"
This reverts commit 998372b479.

This caused a data abort on some platform.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Guillaume GARDET <guillaume.gardet@free.fr>
2016-09-09 13:13:41 -05:00
Tom Rini
aca5cd27db configs: Resync with savedefconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-09 09:51:28 -04:00
Tom Rini
16f416661e Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-09-09 09:45:32 -04:00
Lokesh Vutla
01c5075506 board: ks2: README: Update to add K2G support
Update the README to add support for K2G EVM. Also
- Add steps on how to use MMC boot
- Fix load address when using CCS
- Update build target to u-boot.bin from u-boot-dtb.bin as all ks2
  platforms uses DT.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-09-07 13:52:20 -04:00
Mian Yousaf Kaukab
4c02c11de8 efi_loader: provide efi_mem_desc version
Provide version of struct efi_mem_desc in efi_get_memory_map().

EFI_BOOT_SERVICES.GetMemoryMap() in UEFI specification v2.6 defines
memory descriptor version to 1. Linux kernel also expects descriptor
version to be 1 and prints following warning during boot if its not:

Unexpected EFI_MEMORY_DESCRIPTOR version 0

Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@gmail.com>
2016-09-07 08:49:07 -04:00