Commit graph

13929 commits

Author SHA1 Message Date
Timur Tabi
2339e4972f phylib: wait for TN2020 to achieve SERDES lane alignment at startup
Before the Teranetics TN2020 PHY can be used, the SERDES lanes need to be
aligned, so wait for lane alignment before completing the startup sequence.

Note that this process can take up to three seconds.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:11 -05:00
Timur Tabi
7f92c3a275 powerpc/p3060: remove all references to RCW bits EC1_EXT, EC2_EXT, and EC3
The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the
P3060 and should always be set to zero.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
chenhui zhao
b76aef60df powerpc/mpc8548cds: Add 36-bit support
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
chenhui zhao
fff80975ae powerpc/mpc8548cds: Code cleanup and refactoring
- Rework tlb and law tables.
- PCI2 is not available on MPC8548CDS, so remove it.
- Move the memory map to the board config file.
- Rewrite the board info according to the manual.
- Remove unnecessary macros and redefine some macros to align with other boards.
- Fix some typos.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
Haiying Wang
34fdbdf8d9 powerpc/p3041: fixup portal config info
P3041 has 10 qman portals, we need to configure all of them:
* As there are only 4 physical cores sdest can only be 0 to 3
* We assign dqrr & frame data LIODNs for all portals so if they
  are utilized the proper mapping tables can be setup uniquely
  (PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
  assignments are tuned around an assumption of at most 5
  partitions.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
Haiying Wang
510f28cff9 powerpc/p2041: fixup portal config info
P2041 has 10 qman portals, we need to configure all of them:
* As there are only 4 physical cores sdest can only be 0 to 3
* We assign dqrr & frame data LIODNs for all portals so if they
  are utilized the proper mapping tables can be setup uniquely
  (PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
  assignments are tuned around an assumption of at most 5
  partitions.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:10 -05:00
Haiying Wang
7c7bd635be powerpc/p5020: fixup portal config info
P5020 has 10 qman portals, we need to configure all of them:
* As there are only 2 physical cores sdest can only be 0 or 1
* We assign dqrr & frame data LIODNs for all portals so if they
  are utilized the proper mapping tables can be setup uniquely
  (PAMU stashing)
* We set Portal 6-10 to LIODN offsets 1-5 as the global LIODN
  assignments are tuned around an assumption of at most 5
  partitions.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:09 -05:00
Kuldip Giroh
56a69ff855 powerpc/85xx: Added secure boot option for P2041RDB boards
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-13 23:38:09 -05:00
Wolfgang Denk
d8fffa057c Merge branch 'master' of git://git.denx.de/u-boot-mips
* 'master' of git://git.denx.de/u-boot-mips:
  MIPS: Jz4740: Add qi_lb60 board support
  MIPS: Jz4740: Add NAND driver
  MIPS: Ingenic XBurst Jz4740 processor support
2011-10-12 22:47:15 +02:00
Wolfgang Denk
0dd78fb943 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
* 'master' of git://git.denx.de/u-boot-ppc4xx:
  ppc4xx: Change DDR2 CL from 4 to 5 for intip
  ppc4xx: Improve lm63 pwm on dlvision-10g
  ppc4xx: Do not stop booting on any keypress on intip
2011-10-12 22:45:30 +02:00
Wolfgang Denk
f6d99aa947 Merge branch 'master' of git://git.denx.de/u-boot-ubi
* 'master' of git://git.denx.de/u-boot-ubi:
  UBI: init eba tables before wl when attaching a device
  ubifs bad superblock bug
2011-10-12 22:44:36 +02:00
Wolfgang Denk
e5a0717176 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
* 'master' of git://git.denx.de/u-boot-nand-flash:
  NAND: davinci: choose correct 1-bit h/w ECC reg
2011-10-12 22:43:54 +02:00
Wolfgang Denk
37eefe80bb Merge branch 'master' of git://git.denx.de/u-boot-microblaze
* 'master' of git://git.denx.de/u-boot-microblaze:
  microblaze: Copy bootfile from variables
  microblaze: Fix unaligned.h for endians
  microblaze: Initialize jumptable and console
  microblaze: Support flashes on lower addresses
  microblaze: Call common console_init_f initialization function
2011-10-12 22:42:28 +02:00
Xiangfu Liu
3c945542da MIPS: Jz4740: Add qi_lb60 board support
Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device
from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot.
The initial bring-up assumes that U-Boot is directly loaded into SDRAM
using USB boot tool, and starts from 0x80100000.

About USB boot tool
-------------------

Jz4740 is one of the XBurst processors with USB boot functionality
supported.  The CPU can boot from a small ROM in the LSI, initialize
CPU and USB module, then wait for USB commands from the USB host.
We can send 8 KB binary data to the CPU cache using USB boot tool.

USB boot tool is available to the public at Ingenic website.  Also
there is an alternative Debian package named xburst-tools.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-12 23:28:49 +09:00
Xiangfu Liu
3a6591a86a MIPS: Jz4740: Add NAND driver
Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices

nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60.
We'll bring up boot-from-NAND support in nand_spl/ in the future.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-12 23:28:37 +09:00
Dirk Eibach
15cc385e68 ppc4xx: Change DDR2 CL from 4 to 5 for intip
Some intip boards don't seem to run stable with CL4, datasheets suggest that
CL5 is the safe value.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-10-12 11:50:42 +02:00
Dirk Eibach
97ca7b3b8e ppc4xx: Improve lm63 pwm on dlvision-10g
Fan PWM lookuptable was modified to start at 46 degrees
celsius instead of 40 degrees celsius.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-10-12 11:50:16 +02:00
Dirk Eibach
55ac719dc7 ppc4xx: Do not stop booting on any keypress on intip
Use CONFIG_AUTOBOOT_KEYED on intip so that booting can only be
stopped with well defined keypresses.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-10-12 11:49:43 +02:00
Holger Brunck
d63894654d UBI: init eba tables before wl when attaching a device
This fixes that u-boot gets stuck when a bitflip was detected
during "ubi part <ubi_device>". If a bitflip was detected UBI tries
to copy the PEB to a different place. This needs that the eba table
are initialized, but this was done after the wear levelling worker
detects the bitflip. So changes the initialisation of these two
tasks in u-boot.

This is a u-boot specific patch and not needed in the linux layer,
because due to commit 1b1f9a9d00
UBI: Ensure that "background thread" operations are really executed
we schedule these tasks in place and not as in linux after the inital
task which schedule this new task is finished.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-10-12 11:36:05 +02:00
Lars Poeschel
349a8d5e56 ubifs bad superblock bug
This patch fixes an issue when ubifs reads a bad superblock. Later it
tries to free memory, that was not allocated, which freezes u-boot.
This is fixed by looking for a non null pointer before free.

The message I got before u-boot freezes:
UBI: max/mean erase counter: 53/32
UBIFS: mounted UBI device 0, volume 1, name "rootfs"
UBIFS: mounted read-only
UBIFS: file system size:   49140 bytes (50319360 KiB, 0 MiB, 49140 LEBs)
UBIFS: journal size:       49 bytes (6838272 KiB, 0 MiB, 6678 LEBs)
UBIFS: media format:       w4/r0 (latest is w4/r0)
UBIFS: default compressor: LZO
UBIFS: reserved for root:  0 bytes (0 KiB)
UBIFS error (pid 0): ubifs_read_node: bad node type (255 but expected 9)
UBIFS error (pid 0): ubifs_read_node: bad node at LEB 330:13104
UBIFS error (pid 0): ubifs_iget: failed to read inode 1, error -22
Error reading superblock on volume 'ubi:rootfs'!

Signed-off-by: Lars Poeschel <larsi@wh2.tu-dresden.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-10-12 11:33:17 +02:00
Laurence Withers
6016194371 NAND: davinci: choose correct 1-bit h/w ECC reg
In nand_davinci_readecc(), select the correct NANDF<n>ECC register based
on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
This allows 1-bit hardware ECC to work with chip select other than CS2.

Note this now matches the usage in nand_davinci_enable_hwecc(), which
already had the correct handling, and allows refactoring to a single
function encapsulating the register read.

Without this fix, writing NAND pages to a chip not wired to CS2 would
result in in the ECC calculation always returning FFFFFF for each
512-byte segment, and reading back a correctly written page (one with
ECC intact) would always fail. With this fix, the ECC is written and
verified correctly.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-10 15:28:05 -05:00
Xiangfu Liu
80421fcc3e MIPS: Ingenic XBurst Jz4740 processor support
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator.  Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.

JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.

On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application.  NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.

For more info about Ingenic XBurst Jz4740:
  http://en.ingenic.cn/eng/
  http://www.linux-mips.org/wiki/Ingenic

This patch introduces XBurst CPU support in U-Boot.  It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-10 22:06:12 +09:00
Michal Simek
2267e2d132 microblaze: Copy bootfile from variables
Setup bootfile.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-10 08:54:42 +02:00
Michal Simek
6cdf31124c microblaze: Fix unaligned.h for endians
Also support little endian MB.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-10 08:54:28 +02:00
Michal Simek
aa7acdd509 microblaze: Initialize jumptable and console
This changes were done to get support for netconsole.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-10 08:54:21 +02:00
Michal Simek
a93c1a171c microblaze: Support flashes on lower addresses
Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-10 08:54:20 +02:00
Michal Simek
077a4e6b98 microblaze: Call common console_init_f initialization function
Calling console_init_f enables CTRL+C usage.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-10 08:54:19 +02:00
Xie Xiaobo
2d4afd493b powerpc/mpc8536ds: Save the env variables to SDcard and SPI flash
MPC8536DS offer booting from SDcard or SPI flash.  This patch defined that
u-boot can save the environment variables on SDcard or SPI flash when
booting from the related device.  The Env parameter region and linux
kernel region have overlap in SPI-Flash, So change the Env param saving
address.

Signed-off-by: Xie Xiaobo <r63061@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
Fanzc
1116ebb9a7 powerpc/mpc8536ds: Add USB support for MPC8536DS
Add EHCI controller and USB command definition.

Signed-off-by: Xie Xiaobo <r63061@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
Tang Yuantian
007a28d54d fsl_sata: Fix compile error when CONFIG_LBA48 is not defined
If CONFIG_LBA48 is not defined, the element lba48 of struct sata_dev_desc
is not avaible, and can't be used.

Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
Xie Xiaobo
8af3d22db9 powerpc/mpc8536ds: Invert SDHC_WP pin polarity
MPC8536 Rev 1.0 silicon have NMG_eSDHC118 erratum, so that the SDHC write
protected pin polarity does not follow the SD card standard in MPC8536
Rev 1.0 silicon.

The MPC8536DS board invert the SDHC_WP pin as a workaround.  However, this
silicon erratum has been fixed in Rev 1.1, So need invert the SDHC_WP
polarity again when use the MPC8536 Rev1.1 and greater on MPC8536DS board.

Signed-off-by: Xie Xiaobo <r63061@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
Xie Xiaobo
ae2044d8b3 powerpc/mpc8536ds: Add eSPI support for MPC8536DS
1. The SD_DATA[4:7] signals are shared with the SPI chip selects on 8536DS,
   so don't set MPC85xx_PMUXCR_SD_DATA that config eSDHC data bus-width
   to 4-bit and enable SPI signals.
2. Add eSPI controller and SPI-FLASH definition.

Signed-off-by: Xie Xiaobo <r63061@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
chenhui zhao
867b06f434 powerpc/mpc8548cds: Update config file
- Increase the size of malloc space.
- Enable e1000 network card.
- Show pci devices on startup.
- Change the location of env address.
- Use hwconfig to turn off ECC by default.

[Kumar Gala] Fixed white space formating for CONFIG_EXTRA_ENV_SETTINGS

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
Becky Bruce
1605cc9e1b powerpc/mpc86xx: Disable translation for BAT setup
We really shouldn't be overwriting bat registers with translation enabled,
especially when we're executing code using one of them for translating
the current instruction stream.  Instead, disable address translation
while doing the final BAT setup.

In order to do this, setup_bats has to move back to asm code, because we
require translation to be enabled to have a stack for C code.  The yucky
thing about that is that the assembler doesn't like ULL so we have to
switch to using HIGH/LOW pairs for physical addresses that are > 32 bits
in length.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:54 -05:00
Becky Bruce
e3fd652087 powerpc/mpc8641hpcn: fix SRIO BAT config
There were duplicate (and conflicting) defines for the BATs used
to cover SRIO.  Drop the bogus set.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:53 -05:00
Timur Tabi
3038171628 powerpc/85xx: fix null pointer dereference when init the SGMII TBI PHY
Function dtsec_configure_serdes() needs to know where the TBI PHY registers
are in order to configure SGMII for proper SerDes operation.

During SGMII initialzation, fm_eth_init_mac() passing NULL for 'phyregs'
when it called init_dtsec(), because it was believed that phyregs was not
used.  In fact, it is used by dtsec_configure_serdes() to configure the TBI
PHY registers.

We also need to define the PHY registers in struct fm_mdio.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:53 -05:00
York Sun
712cf7ab0b powerpc/mpc8xxx: Merge entries in DDR speed table
It is not necessary to keep multiple entries for the same setting in DDR
speed tables. Merge them for smaller tables. Also restructure the tables
for smaller size. Cleanup some typedefs.

Enforce strict checking for speed table. If DIMM is running at higher than
known speed, try to use the highest speed setting. If rank is unknown, it
has to panic.

Removed ODT overriding for P2020DS as it is not necessary.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:53 -05:00
Andy Fleming
ebfdacb42b phylib: Work around bug in Teranetics PHY
The Teranetics PHY does not properly report the link state
for fiber connections. The new PHY code actually checked the link,
and so the FM driver would refuse to talk over a linkless PHY.

But the link may actually be up, so now we always report it as up
for fiber connections on the tn2020.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2011-10-09 17:57:53 -05:00
Timur Tabi
babb348cd0 powerpc/85xx: CONFIG_ENABLE_36BIT_PHYS does not depend on CONFIG_PHYS_64BIT
The macro CONFIG_ENABLE_36BIT_PHYS is used to indicate that the given SOC is
capable of 36-bit physical addresses, even if such large addresses are not
used.  On two boards, this macro was enabled only when building a 36-bit
image.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:53 -05:00
York Sun
6f5e1dc531 powerpc/8xxx: Add support for interactive DDR programming interface
Interactive DDR debugging provides a user interface to view and modify SPD,
DIMM parameters, board options and DDR controller registers before DDR is
initialized. With this feature, developers can fine-tune DDR for board
bringup and other debugging without frequently having to reprogram the flash.

To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header
file and set an environment variable to activate it. Syntax:

setenv ddr_interactive on

After reset, U-boot prompts before initializing DDR controllers
FSL DDR>

The available commands are
print      print SPD and intermediate computed data
reset      reboot machine
recompute  reload SPD and options to default and recompute regs
edit       modify spd, parameter, or option
compute    recompute registers from current next_step to end
next_step  shows current next_step
help       this message
go         program the memory controller and continue with u-boot

The first command should be "compute", which reads data from DIMM SPDs and
board options, performs the calculation then stops before setting DDR
controller. A user can use "print" and "edit" commands to view and modify
anything. "Go" picks up from current step with any modification and
compltes the calculation then enables the DDR controller to continue u-boot.
"Recompute" does it over from fresh reading.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:53 -05:00
Wolfgang Denk
0841ca90f2 arm920t/s3c24x0/usb_ohci.c: fix warning: variable ... set but not used
Fix:
usb_ohci.c: In function 'dl_transfer_length':
usb_ohci.c:768:8: warning: variable 'tdINFO' set but not used [-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
2011-10-09 23:24:50 +02:00
Wolfgang Denk
fad2e1b06c common/usb.c: fix warning: variable ... set but not used
Fix:
usb.c: In function 'usb_parse_config':
usb.c:331:17: warning: variable 'ch' set but not used [-Wunused-but-set-variable]
usb.c: In function 'usb_hub_port_connect_change':
usb.c:1123:29: warning: variable 'portchange' set but not used [-Wunused-but-set-variable]
usb.c: In function 'usb_hub_configure':
usb.c:1183:25: warning: variable 'hubsts' set but not used [-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Acked-by: Remy Bohmer <linux@bohmer.net>
2011-10-09 23:24:50 +02:00
Wolfgang Denk
6bc52ef35c drivers/usb/host/ohci-hcd.c: fix warning: variable ... set but not used
Fix:
ohci-hcd.c: In function 'dl_transfer_length':
ohci-hcd.c:968:8: warning: variable 'tdINFO' set but not used [-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Acked-by: Remy Bohmer <linux@bohmer.net>
2011-10-09 23:24:49 +02:00
Wolfgang Denk
10f4dd784f common/cmd_usb.c: fix warning: variable ... set but not used
Fix:
cmd_usb.c: In function 'usb_show_tree_graph':
cmd_usb.c:284:29: warning: variable 'port' set but not used [-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Acked-by: Remy Bohmer <linux@bohmer.net>
2011-10-09 23:24:49 +02:00
Wolfgang Denk
bf513c2d75 drivers/net/smc91111.c: fix warning: variable ... set but not used
Fix:
smc91111.c: In function 'smc_phy_configure':
smc91111.c:1194:6: warning: variable 'failed' set but not used [-Wunused-but-set-variable]
smc91111.c:1190:7: warning: variable 'phyaddr' set but not used [-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-10-09 23:24:49 +02:00
Wolfgang Denk
16b9afd2b3 fs/jffs2/jffs2_1pass.c: fix warning: variable ... set but not used
Fix:
jffs2_1pass.c: In function 'jffs2_1pass_read_inode':
jffs2_1pass.c:699:7: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
jffs2_1pass.c: In function 'jffs2_1pass_build_lists':
jffs2_1pass.c:1578:14: warning: variable 'empty_start' set but not used [-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-10-09 23:24:49 +02:00
Wolfgang Denk
419a1fe954 CFI: fix warning: variable ... set but not used
Fix:
cfi_mtd.c: In function 'cfi_mtd_init':
cfi_mtd.c:226:19: warning: variable 'mtd_list' set but not used [-Wunused-but-set-variable]
cfi_mtd.c: In function 'cfi_mtd_init':
cfi_mtd.c:225:6: warning: unused variable 'devices_found'
cfi_mtd.c: In function 'cfi_mtd_init':
cfi_mtd.c:226:19: warning: variable 'mtd_list' set but not used [-Wunused-but-set-variable]
[-Wunused-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2011-10-09 23:24:49 +02:00
Wolfgang Denk
80c6abc306 arch/arm/lib/board.c: fix warning: variable ... set but not used
Fix:
board.c:445:8: warning: variable 'bd' set but not used [-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-10-09 23:24:48 +02:00
Michael Walle
1a9845b4f0 netconsole: support packets longer than 512 bytes
Esp. while printing the environment the output is usually longer than 512
bytes. Instead of cutting the message, send multiple 512 bytes packets.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-09 23:24:48 +02:00
Che-liang Chiou
ca366d0e38 cmd_time: add time command
The 'time' command runs and reports execution time of commands.

Sample usage:
--------------------
u-boot# time crc 0x1000 1000
CRC32 for 00001000 ... 00001fff ==> ae94dc4b

time: 0.004 seconds, 4 ticks
--------------------

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-09 23:24:48 +02:00