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ppc4xx: Change DDR2 CL from 4 to 5 for intip
Some intip boards don't seem to run stable with CL4, datasheets suggest that CL5 is the safe value. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
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1 changed files with 6 additions and 6 deletions
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@ -37,10 +37,10 @@
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#define CONFIG_460EX 1 /* Specific PPC460EX */
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#ifdef CONFIG_DEVCONCENTER
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#define CONFIG_HOSTNAME devconcenter
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#define CONFIG_IDENT_STRING " devconcenter 0.03"
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#define CONFIG_IDENT_STRING " devconcenter 0.05"
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#else
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#define CONFIG_HOSTNAME intip
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#define CONFIG_IDENT_STRING " intip 0.03"
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#define CONFIG_IDENT_STRING " intip 0.05"
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#endif
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#define CONFIG_440 1
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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@ -200,13 +200,13 @@
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#define CONFIG_SYS_SDRAM0_INITPLR2 0x81020000
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#define CONFIG_SYS_SDRAM0_INITPLR3 0x81030000
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#define CONFIG_SYS_SDRAM0_INITPLR4 0x81010002
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#define CONFIG_SYS_SDRAM0_INITPLR5 0xE4000542
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#define CONFIG_SYS_SDRAM0_INITPLR5 0xE4000552
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#define CONFIG_SYS_SDRAM0_INITPLR6 0x81900400
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#define CONFIG_SYS_SDRAM0_INITPLR7 0x8A880000
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#define CONFIG_SYS_SDRAM0_INITPLR8 0x8A880000
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#define CONFIG_SYS_SDRAM0_INITPLR9 0x8A880000
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#define CONFIG_SYS_SDRAM0_INITPLR10 0x8A880000
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#define CONFIG_SYS_SDRAM0_INITPLR11 0x81000442
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#define CONFIG_SYS_SDRAM0_INITPLR11 0x81000452
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#define CONFIG_SYS_SDRAM0_INITPLR12 0x81010382
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#define CONFIG_SYS_SDRAM0_INITPLR13 0x81010002
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#define CONFIG_SYS_SDRAM0_INITPLR14 0x00000000
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@ -216,11 +216,11 @@
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#define CONFIG_SYS_SDRAM0_RDCC 0x40000000
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#define CONFIG_SYS_SDRAM0_DLCR 0x00000000
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#define CONFIG_SYS_SDRAM0_CLKTR 0x40000000
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#define CONFIG_SYS_SDRAM0_WRDTR 0x84000823
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#define CONFIG_SYS_SDRAM0_WRDTR 0x86000823
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#define CONFIG_SYS_SDRAM0_SDTR1 0x80201000
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#define CONFIG_SYS_SDRAM0_SDTR2 0x32204232
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#define CONFIG_SYS_SDRAM0_SDTR3 0x090C0D15
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#define CONFIG_SYS_SDRAM0_MMODE 0x00000442
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#define CONFIG_SYS_SDRAM0_MMODE 0x00000452
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#define CONFIG_SYS_SDRAM0_MEMODE 0x00000002
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#define CONFIG_SYS_MBYTES_SDRAM 256 /* 256MB */
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