Commit graph

61 commits

Author SHA1 Message Date
Gerald Van Baren
f35a53fc7b Fix the ft_cpu_setup() property settings.
Use "setter" functions instead of flags, cleaner and more flexible.
It also fixes the problem noted by Timur Tabi that the ethernet MAC
addresses were all being set incorrectly to the same MAC address.
2007-04-15 13:54:26 -04:00
Gerald Van Baren
64dbbd40c5 Moved fdt command support code to fdt_support.c
...in preparation for improving the bootm command's handling of fdt blobs.
Also cleaned up some coding sloppiness.
2007-04-06 14:19:43 -04:00
Gerald Van Baren
aea03c4e8c Fix some minor whitespace violations. 2007-03-31 14:30:53 -04:00
Gerald Van Baren
213bf8c822 Add a flattened device tree (fdt) command (2 of 2)
Modifications to the existing code to support the new fdt command.
2007-03-31 12:23:51 -04:00
Kumar Gala
4feab4de7b mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode
The config value for:
* CFG_ACR_PIPE_DEP
* CFG_ACR_RPTCNT
* CFG_SPCR_TSEC1EP
* CFG_SPCR_TSEC2EP
* CFG_SCCR_TSEC1CM
* CFG_SCCR_TSEC2CM

Were not being used when setting the appropriate register

Added:
* CFG_SCCR_USBMPHCM
* CFG_SCCR_USBDRCM
* CFG_SCCR_PCICM
* CFG_SCCR_ENCCM

To allow full config of the SCCR.

Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
that were just bogus.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-02 14:08:26 -06:00
Kim Phillips
d51b3cf371 mpc83xx: update [local-]mac-address properties on UEC based devices
8360 and 832x weren't updating their [local-]mac-address
properties. This patch fixes that.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-03-02 11:05:54 -06:00
Timur Tabi
61f4f912ac mpc83xx: write MAC address to mac-address and local-mac-address
Some device trees have a mac-address property, some have local-mac-address,
and some have both.  To support all of these device trees, this patch
updates ftp_cpu_setup() to write the MAC address to mac-address if it exists.
This function already updates local-mac-address.

Signed-off-by: Timur Tabi <timur@freescale.com>
2007-03-02 11:05:54 -06:00
Xie Xiaobo
d61853cf24 mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xx
The code supply fixed and SPD initialization for MPC83xx DDR2 Controller.
it pass DDR/DDR2 compliance tests.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2007-03-02 11:05:54 -06:00
Xie Xiaobo
b110f40bd1 mpc83xx: Add the cpu specific code for MPC8360E rev2.0 MDS
MPC8360E rev2.0 have new spridr,and PVR value,
The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2007-03-02 11:05:54 -06:00
Xie Xiaobo
8d172c0f0d mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDS
MPC8349E rev3.1 have new spridr,and PVR value,
The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM.

Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
2007-03-02 11:05:54 -06:00
Kim Phillips
97c4b397dc mpc83xx: don't hang if watchdog configured on 8360, 832x
don't hang if watchdog configured on 8360, 832x

The watchdog programming model is the same across all 83xx devices;
make the code reflect that.
2007-03-02 11:05:53 -06:00
Kim Phillips
b700474785 mpc83xx: protect memcpy to bad address if a local-mac-address is missing from dt
protect memcpy to bad address if a local-mac-address is missing from dt
2007-03-02 11:05:53 -06:00
Kumar Gala
3e78a31cfe mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead
The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all
MPC834X class processors.  Change the protections from CONFIG_MPC8349 to
CONFIG_MPC834X so they are more generic.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-02 11:05:53 -06:00
Paul Gortmaker
91e2576977 mpc83xx: U-Boot support for Wind River SBC8349
I've redone the SBC8349 support to match git-current, which
incorporates all the MPC834x updates from Freescale since the 1.1.6
release,  including the DDR changes.

I've kept all the SBC8349 files as parallel as possible to the
MPC8349EMDS ones for ease of maintenance and to allow for easy
inspection of what was changed to support this board.  Hence the SBC8349
U-Boot has FDT support and everything else that the MPC8349EMDS has.

Fortunately the Freescale updates added support for boards using CS0,
but I had to change spd_sdram.c to allow for board specific settings for
the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
default if the board doesn't specify a value.)

Hopefully this should be mergeable as-is and require no whitespace
cleanups or similar, but if something doesn't measure up then let me
know and I'll fix it.

Thanks,
Paul.
2007-03-02 11:05:53 -06:00
Jerry Van Baren
f35f358241 mpc83xx: Put the version (and magic) after the HRCW.
Put the version (and magic) after the HRCW.  This puts it in a fixed
location in flash, not at the start of flash but as close as we can get.

Signed-off-by: Jerry Van Baren <vanbaren@cideas.com>
2007-03-02 11:05:53 -06:00
Dave Liu
24c3aca3f1 mpc83xx: Add support for the MPC832XEMDS board
This patch supports DUART, ETH3/4 and PCI etc.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2007-03-02 11:05:53 -06:00
Dave Liu
e080313c32 mpc83xx: streamline the 83xx immr head file
For better format and style, I streamlined the 83xx head files,
including immap_83xx.h and mpc83xx.h. In the old head files, 1)
duplicated macro definition appear in the both files; 2) the structure
of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The
macro definition put inside the each structure. So, I cleaned up the
structure of QE immr from immap_83xx.h, deleted the duplicated stuff and
moved the macro definition to mpc83xx.h, Just like MPC8260.

CHANGELOG

*streamline the 83xx immr head file

Signed-off-by: Dave Liu <daveliu@freescale.com>
2007-03-02 11:05:53 -06:00
Wolfgang Denk
dd520bf314 Code cleanup. 2006-11-30 18:02:20 +01:00
Timur Tabi
e857a5bdb3 mpc83xx: Miscellaneous code style fixes
Implement various code style fixes and similar changes.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-28 23:34:30 -06:00
Timur Tabi
be5e61815d mpc83xx: Update 83xx to use fsl_i2c.c
Update the 83xx tree to use I2C support in drivers/fsl_i2c.c.  Delete
cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
Added multiple I2C bus support to fsl_i2c.c.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:23 -06:00
Timur Tabi
d239d74b1c mpc83xx: Replace CFG_IMMRBAR with CFG_IMMR
Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
tree matches the other 8xxx trees.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:23 -06:00
Kim Phillips
f7fb2e703e mpc83xx: Lindent and clean up cpu/mpc83xx/speed.c 2006-11-03 19:42:22 -06:00
Dave Liu
90f30a710a mpc83xx: Fix the incorrect dcbz operation
The 834x rev1.x silicon has one CPU5 errata.

The issue is when the data cache locked with
HID0[DLOCK], the dcbz instruction looks like no-op inst.

The right behavior of the data cache is when the data cache
Locked with HID0[DLOCK], the dcbz instruction allocates
new tags in cache.

The 834x rev3.0 and later and 8360 have not this bug inside.

So, when 834x rev3.0/8360 are working with ECC, the dcbz
instruction will corrupt the stack in cache, the processor will
checkstop reset.

However, the 834x rev1.x can work with ECC with these code,
because the sillicon has this cache bug. The dcbz will not
corrupt the stack in cache.
Really, it is the fault code running on fault sillicon.

This patch fix the incorrect dcbz operation. Instead of
CPU FP writing to initialise the ECC.

CHANGELOG:
* Fix the incorrect dcbz operation instead of CPU FP
writing to initialise the ECC memory. Otherwise, it
will corrupt the stack in cache, The processor will checkstop
reset.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2006-11-03 19:42:22 -06:00
Kim Phillips
48041365b3 mpc83xx: change ft code to modify local-mac-address property
Update 83xx OF code to update local-mac-address properties
for ethernet instead of the obsolete 'address' property.
2006-11-03 19:42:22 -06:00
Timur Tabi
9ca880a250 mpc83xx: Fix dual I2C support for the MPC8349ITX, MPC8349EMDS, TQM834x, and MPC8360EMDS
This patch also adds an improved I2C set_speed(), which handles all clock
frequencies.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:22 -06:00
Dave Liu
7737d5c658 mpc83xx: add QE ethernet support
this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
2006-11-03 19:42:21 -06:00
Dave Liu
5f8204394e mpc83xx: Add MPC8360EMDS basic board support
Add support for the Freescale MPC8360EMDS board.
Includes DDR, DUART, Local Bus, PCI.
2006-11-03 19:42:21 -06:00
Timur Tabi
2ad6b513b3 mpc83xx: Add support for the MPC8349E-mITX
PREREQUISITE PATCHES:

* This patch can only be applied after the following patches have been applied:

  1) DNX#2006090742000024 "Add support for multiple I2C buses"
  2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
  3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
  4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
  5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"

CHANGELOG:

* Add support for the Freescale MPC8349E-mITX reference design platform.
  The second TSEC (Vitesse 7385 switch) is not supported at this time.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:20 -06:00
Ben Warren
b24f119d67 Multi-bus I2C implementation of MPC834x
Hello,

Attached is a patch implementing multiple I2C buses on the MPC834x CPU
family and the MPC8349EMDS board in particular.
This patch requires Patch 1 (Add support for multiple I2C buses).
Testing was performed on a 533MHz board.

/*** Note: This patch replaces ticket DNX#2006083042000027 ***/

Signed-off-by: Ben Warren <bwarren@qstreams.com>

CHANGELOG:
        Implemented driver-level code to support two I2C buses on the
MPC834x CPU family and the MPC8349EMDS board.  Available I2C bus speeds
are 50kHz, 100kHz and 400kHz on each bus.

regards,
Ben
2006-11-03 19:42:19 -06:00
Timur Tabi
bed85caf87 mpc83xx: Add support for Errata DDR6 on MPC 834x systems
CHANGELOG:

* Errata DDR6, which affects all current MPC 834x processors, lists changes
  required to maintain compatibility with various types of DDR memory.  This
  patch implements those changes.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:19 -06:00
Timur Tabi
31068b7c4a mpc83xx: Add support for variable flash memory sizes on 83xx systems
CHANGELOG:

* On 83xx systems, use the CFG_FLASH_SIZE macro to program the LBC local access
   window registers, instead of using a hard-coded value of 8MB.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:18 -06:00
Dave Liu
f6eda7f80c mpc83xx: Changed to unified mpx83xx names and added common 83xx changes
Incorporated the common unified variable names and the changes in preparation
for releasing mpc8360 patches.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2006-11-03 19:42:18 -06:00
Tanya Jiang
09a81ff740 mpc83xx: Removed unused file resetvec.S for mpc83xx cpu
Removed unused file resetvec.S for mpc83xx cpu

Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
2006-11-03 19:42:17 -06:00
Wolfgang Denk
2b208f5308 Move "ar" flags to config.mk to allow for silent "make -s"
Based on patch by Mike Frysinger, 20 Jun 2006
2006-10-09 01:02:05 +02:00
Wolfgang Denk
511d0c72b8 Coding style cleanup 2006-10-09 00:42:01 +02:00
Marian Balakowicz
f93286397e Add support for a saving build objects in a separate directory.
Modifications are based on the linux kernel approach and
support two use cases:

  1) Add O= to the make command line
  'make O=/tmp/build all'

  2) Set environement variable BUILD_DIR to point to the desired location
  'export BUILD_DIR=/tmp/build'
  'make'

The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'

Command line 'O=' setting overrides BUILD_DIR environent variable.

When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
2006-09-01 19:49:50 +02:00
Kumar Gala
8fe9bf61ef Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:
- Removed MPC8349ADS port
  - Added PCI support to MPC8349ADS
  - reworked memory map to allow mapping of all regions with BATs
  Patch by Kumar Gala 20 Apr 2006

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2006-04-20 13:45:32 -05:00
Wolfgang Denk
cf48eb9abd Some code cleanup 2006-04-16 10:51:58 +02:00
Wolfgang Denk
d87080b721 GCC-4.x fixes: clean up global data pointer initialization for all boards. 2006-03-31 18:32:53 +02:00
Rafal Jaworowski
dc9e499c62 Support for DDR with 32-data path. Addotional notes on injecting
multiple-bit errors.
2006-03-16 17:46:46 +01:00
Marian Balakowicz
4c8d1ecce2 Add support for ECC DDR initialization on MPC83xx. 2006-03-14 16:23:35 +01:00
Marian Balakowicz
61f25155ac Add DMA support for MPC83xx. 2006-03-14 16:14:48 +01:00
Marian Balakowicz
6d8ae5abb5 Add sync in do_reset() routine for MPC83xx after RPR register
was written to. It is need on some targets when BAT translation
is enabled.
2006-03-14 16:12:48 +01:00
Marian Balakowicz
cd94ba397e Add Dcbz(), Dcbi() and Dcbf() routines for MPC83xx. 2006-03-14 16:02:31 +01:00
Marian Balakowicz
a7c66ad2e5 Correct shift offsets in icache_status and dcache_status for MPC83xx. 2006-03-14 16:01:25 +01:00
Wolfgang Denk
795bee8496 Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#mpc83xx 2006-03-12 21:33:52 +01:00
Kumar Gala
2688e2f972 Enable address translation on MPC83xx
Patch by Kumar Gala, 10 Feb 2006
2006-02-10 15:40:06 -06:00
Kumar Gala
c99f384dce Decopuled setting of OR/BR and LBLAWBAR/LBLAWAR on MPC83xx
Patch by Kumar Gala, 25 Jan 2006
2006-01-25 16:12:46 -06:00
Kumar Gala
62ec6418d4 Add helper function for generic flat device tree fixups for mpc83xx
Patch by Kumar Gala 11 Jan 2006
2006-01-11 16:48:10 -06:00
Kumar Gala
ec00c33578 Only disable the MPC83xx watchdog if its enabled out of reset.
If its disabled out of reset SW can later enable it if so desired
Patch by Kumar Gala, 11 Jan 2006
2006-01-11 11:23:01 -06:00