Commit graph

9073 commits

Author SHA1 Message Date
Jagan Teki
1a2131ce05 at91: vinco: Enable DM
Enable Driver model for AT91 Vinco boards.

Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
8b562ef388 at91: taurus: Enable DM_SPI
Enable DM_SPI for atmel SPI driver on taurus board.

Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Jagan Teki
08afabc157 at91: gurnard: Enable DM_SPI
Enable DM_SPI for atmel SPI driver on gurnard board.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-06 16:11:09 -04:00
Tom Rini
6074c3879c Patch queue for rpi - 2018-04-06
Highlights this time around:
 
   - Support for new RPi3 B+ model
   - Fix for some SD cards on newer RPi firmware
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJaxzkSAAoJECszeR4D/txg8LsQALXv0VwSROVMeneJn98ItB8I
 J2bF4vnGlGw3tdekogwOSh+lZ1MgNAM/nmu3qHVfJ1cnytMfAYtZaTL1FhD9gRxQ
 OnZFiYFpqX4j1yER6RFf403dnYAUw8S595kOzCy6zeArFuHQ+Ilxl+68PaYnktq/
 ICKnGDyv6zYz9WHACOqPcXRSIXEbbmGNW1krqeqGlOkoJiqWvKiET1PCL6qdz2UK
 MurM21XOwbTbDlcFmcie+UjBWliCLBGsJx6riPqvM75bkz5ex3yqhGOlWvqiAKvq
 Dt0ZTF4PIqXPmmMm5JLnMIFCLKPTS+W+ZwY+a1VyYXWhJXmo2UhOJI4ap5lsn1MR
 rinu+oNBC4FAIVhFEk/itGf1p1Diuuwxur4NsJKtLZqeIA1RqGqVSMipia0Wa+K9
 hhamltQoHQ7jNnjSEj0iRT11uTrwLxSKaqfbRtvTaovkF0r5pAJU3qJvTgea72lG
 3eUSfUOnVv8ez8Oy/B/sEK9/hKhZnKN1pM6jr7HVaWXy2XdqSMlTr9wZndDYKHtA
 FQSrjRMet1X8nZWDFGrS8AocFQ8AwGYZL7NBh7Gu8EphFAm0lF0UovkNpqdxnuOx
 buVDkfAKYwS9+GI3GPs8zIKz4aI4UD5pZmybHyQk3NjKXS1YrTEeeDYEVPBRWgC0
 3aXQ7FPcUyfdrIyAPByZ
 =jqq6
 -----END PGP SIGNATURE-----

Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-04-06

Highlights this time around:

  - Support for new RPi3 B+ model
  - Fix for some SD cards on newer RPi firmware
2018-04-06 08:30:10 -04:00
Jonathan Gray
8ae1f82988 mmc: use core clock frequency in bcm2835 sdhost
In raspberrypi-firmware 7fdcd00e00a42a1c91e8bd6f5eb8352fe9358557 and
later start.elf now sets the EMMC clock to 200 MHz.

According to Phil Elwell in
https://github.com/raspberrypi/firmware/issues/953
the SDHost controller shares the core/VPU clock and doesn't use
the EMMC clock.

Use the core clock id when determining the frequency to allow
U-Boot to work with recent versions of raspberrypi-firmware.
Otherwise U-Boot hangs at:

U-Boot 2018.03 (Mar 14 2018 - 20:36:00 +1100)

DRAM:  948 MiB
RPI 3 Model B (0xa02082)
MMC:   mmc@7e202000: 0, sdhci@7e300000: 1
Loading Environment from FAT...

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-04-05 13:17:43 +02:00
Tom Rini
e294ba0678 Merge git://git.denx.de/u-boot-sunxi
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-04 14:10:39 -04:00
Andre Przywara
0bb48ef243 arm: dts: sunxi: update H5 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
OrangePi PC2 over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
e88d2a57f3 arm: dts: sunxi: update H3 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
various H3 boards over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Andre Przywara
06a57f656b arm: dts: sunxi: update A64 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used for the
Pine64+ board over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-04 11:31:35 +05:30
Miquel Raynal
491feffa88
sunxi: dts: enable NAND on NES classic
Let the Nintendo NES Classic use the Macronix NAND chip on it.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:56 +02:00
Miquel Raynal
663e8a9b54
sunxi: allow NAND support to be compiled for sun8i platforms
Add some clocks/PLL definitions as well as the dependency on MACH_SUN8I
in Kconfig.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-04-03 12:11:52 +02:00
Tom Rini
f3b623fa52 Merge git://git.denx.de/u-boot-marvell 2018-03-30 18:18:22 -04:00
Wilson Ding
9734104fe4 arm64: a37xx: dts: enable pcie port
This patch enabled PCIe port on both devel-board
and espressobin board.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Wilson Ding
92e7a6814c arm64: a37xx: populate pcie memory region
This patch added a new region of 32MiB AT 0xe800.0000
to Armada37x0's memory map. This region is supposed to
be mapped in MMU in order to enable the access to the
PCI I/O or MEM resources.

Signed-off-by: Wilson Ding <dingwei@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38724
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Victor Gu <xigu@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:49 +02:00
Ken Ma
fd81eb9edf Revert "arm64: a37xx: dts: Add pin control nodes to DT"
The commit "arm64: mvebu: Add pinctrl nodes for Armada 3700" has
added new pinctrl nodes.
This reverts commit f7cab0f95b.

Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
30aecc02f7 arm64: a37xx: dts: Correct mpp definitions
This patch corrects below mpp definitions for armada 3720 DB board
and ESPRESSOBin board:
- "smi" pins group is added and "smi" function is set for eth0;
- Now pcie pins are used as gpio to implement PCIe function in
  hardware, so "pcie" group function is changed to "gpio".

Reviewed-on: http://vgitil04.il.marvell.com:8080/43287
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
8aecbcd166 arm64: a37xx: dts: Fix the number of GPIO on south bridge
The number of pins in South Bridge is 30 and not 29. There is a fix for
the driver for the pinctrl, but a fix is also need at device tree level
for the GPIO.

Reviewed-on: http://vgitil04.il.marvell.com:8080/43286
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
4382e53e96 arm64: a37xx: dts: Add additional pinctrl definition
Add mmc pins, pcie pins and sdio pins definition and do these pins'
configuration for DB board and espressobin board;
Add uart2 pins configuration for DB board.

Reviewed-on: http://vgitil04.il.marvell.com:8080/40914
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Tested-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
d7d3ee5d64 arm64: a37xx: dts: Add pinctrl configuration for ESPRESSOBin board
Reviewed-on: http://vgitil04.il.marvell.com:8080/40913
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Tested-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Ken Ma
d13d8ba1e4 arm64: a37xx: dts: add gpio head file including
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-03-30 12:52:48 +02:00
Alexander Kochetkov
7a6d7d3e12 rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3188.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Alexander Kochetkov
b1d093d256 rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3036.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Philipp Tomsich
41837e8a6b rockchip: pinctrl: rk3399: add support for I2C[123467]
This adds support for the (to date unsupported) I2C controllers 1~4
and 6~7 (i.e. now all controllers except I2C5, which is not accessible
on the RK3399-Q7, are supported by pinctrl).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Philipp Tomsich
339267a08d rockchip: pinctrl: rk3399: fix GPIO2B1 and GPIO2B2 shift value
The shift values for GPIO2B1 and GPIO2B2 had in fact referred to
GPIO2B0 and GPIO2B1, respectively.  This substitutes the correct
values.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-03-28 23:30:30 +02:00
Siva Durga Prasad Paladugu
c436bf92f6 arm64: zynqmp: Add support for verifying secure images
This patch adds new command "zynqmp" to handle zynqmp
specific commands like "zynqmp secure". This secure command is
used for verifying zynqmp specific secure images. The secure
image can either be authenticated or encrypted or both encrypted
and authenticated. The secure image is prepared using bootgen
and will be in xilinx specific BOOT.BIN format. The optional
key can be used for decryption of encrypted image if user
key was specified while creation BOOT.BIN.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:36:15 +01:00
Michal Simek
348dbf4368 arm64: zynqmp: Remove ep108 board
ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:59 +01:00
Michal Simek
f5e2943b8b arm: zynq: Enable cadence driver on zc706
Enable watchdog with reset-on-timeout feature.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
e6cc3b25d7 arm: zynq: Wire watchdog internals
Watchdog is only enabled in full u-boot. Adoption for SPL should be also
done because that's the right place where watchdog should be enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
1cf6cac4d1 arm64: zynqmp: Enable newer pmufw versions
As of now newer pmufw is keeping old interfaces. That's why permit
u-boot to run on newer version. Recommended version will be setup later.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:34:43 +01:00
Michal Simek
ee4983f73a arm64: zynqmp: Convert board to use zynqmp-clk driver
Use zynqmp clock driver instead of fixed clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-23 09:30:44 +01:00
Tom Rini
b0af10443a Merge git://git.denx.de/u-boot-net 2018-03-22 16:35:43 -04:00
Lokesh Vutla
459353d43a ARM: dts: da850-lcdk: Sync from Linux 4.16
Sync dts from Linux 4.16 and also add u-boot specific
dtsi for OMAPl138 board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:31 -04:00
Lokesh Vutla
891ab74b1f davinci: Enable DDR_INIT for DA8XX
Commit 6aa4ad8e38 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
converted SOC_DA8XX to Kconfig but missed enabling DDR_INIT for
SOC_DA8XX, which broke OMAPL138 to boot.

Commit 2e87980580 ("davinci: Fix omapl138_lcdk builds") disabled
DDR_INIT for all DA850 SoCs. This failed all DA850 boards to boot
as ddr is not being initialized.

Enable SYS_DA850_DDR_INIT for DA8XX so that all DA850 and OMAPL138
will have ddr initialized

Fixes: 2e87980580 ("davinci: Fix omapl138_lcdk builds")
Fixes: 6aa4ad8e38 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-22 16:32:31 -04:00
Calvin Johnson
ac0ba47b9c armv8: layerscape: csu: enable ns access to PFE registers
Enable all types of non-secure access to PFE block registers.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
c4dc68b02f armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC
1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces
to bufferable.
2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces.
3. Disable ECC detection for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Calvin Johnson
c44f8125bc armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure
SoC specific PFE macros are defined and structure ccsr_scfg
is updated with members defined for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:30 -05:00
Prabhakar Kushwaha
6b1373f245 armv8: fsl-layerscape: Add support of GPIO structure
Layerscape Gen2 SoC supports GPIO registers to control GPIO
signals. Adding support of GPIO structure to access GPIO
registers.

Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-03-22 15:05:28 -05:00
Tom Rini
9c0e2f6ed3 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-03-20 18:39:27 -04:00
Ashish Kumar
c1c597e8a8 armv8: ls1088aqds: Add IFC-NOR as boot source for LS1088
IFC-NOR and QSPI-NOR pins are multiplexed on SoC, so they cannot be
accessed simultaneously. IFC-NOR can be accessed along with SD-BOOT.

Ls1088aqds_sdcard_ifc_defconfig is default config for SD boot and
IFC-NOR to be used as flash. This allows writing to IFC-NOR flash.
QSPI and DSPI cannot be accessed in this defconfig.
IFC-NOR image is generated using ls1088aqds_defconfig.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-03-20 08:27:13 -07:00
Tom Rini
c17848a798 Merge git://git.denx.de/u-boot-sunxi 2018-03-19 18:39:14 -04:00
Patrick Delaunay
f8598d9815 board: st: add generic board for STM32MP1 family
Add first support for STM32MP157C-ED1 board with "Basic" boot chain
1/ Boot Rom: load SPL with STM32 image header in SYSRAM
2/ SPL: power up and initialize the DDR and load U-Boot image
        from SDCARD in DDR
3/ U-Boot: search and load extlinux.conf in SDCARD
           (DISTRO activated)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
Patrick Delaunay
3d2d115a30 dts: add device tree for STM32MP157C-ED1 board
Add minimal devicetree for STM32MP157C-ED1 board,
with only the devices to allow boot from SDCARD:
- RCC for clock and reset
- UART4 for console
- I2C and PMIC
- DDR
- SDMMC0 for SDCard

Waiting Kernel upstream for alignment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:22 -04:00
Patrick Delaunay
e70f70aa65 ram: stm32mp1: add driver
Add driver and binding for stm32mp1 ddr controller and phy

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Patrick Delaunay
2514c2d0e6 arm: stm32: add new architecture for STM32MP family
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:21 -04:00
Patrick Delaunay
77aace579a arm: armv7: solve issue for timer_rate_hz in arch timer
The current value timer_rate_hz causes a problem with function
timer_get_us() from lib time and then an issue with
readx_poll_timeout() function.

With corrected value for tbclk() = timer_rate_hz = CONFIG_SYS_HZ_CLOCK
the weak functions in lib timer can be used:
- get_timer()
- __udelay()
So the specific function in this file are removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-03-19 16:14:20 -04:00
Jagan Teki
0354f4bef0 sunxi: Add DRAM_SUN8I_A83T kconfig entry
Add proper and simple kconfig option for dram_sun8i_a83t.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:47 +05:30
Jagan Teki
c335e9903c sunxi: Add DRAM_SUN8I_A33 kconfig entry
Add proper and simple kconfig option for dram_sun8i_a33.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:44 +05:30
Jagan Teki
af30393cb5 sunxi: Add DRAM_SUN8I_A23 kconfig entry
Add proper and simple kconfig option for dram_sun8i_a23.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:41 +05:30
Jagan Teki
7d0b165d5e sunxi: Add DRAM_SUN9I kconfig entry
Add proper and simple kconfig option for dram_sun9i.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:37 +05:30
Jagan Teki
dd928bfbb6 sunxi: Add DRAM_SUN4I kconfig entry
Add proper and simple kconfig option for dram_sun4i.c
instead of using MACH type on Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-03-19 16:46:14 +05:30