Commit graph

73376 commits

Author SHA1 Message Date
Michal Simek
184309b8c6 arm64: zynqmp: Add maximum-speed property for dwc3 nodes
dwc3 can be used only for higher speeds than super-speed that's why
explicitly set it up.
This is also aligned with other ZynqMP dts files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
7c3ad8f6a3 arm64: zynqmp: Remove additional header from zc1232 DT
Remove unused phy.h from zc1232 DTS.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
02860e1562 zynqmp: Remove u-boot,dm-pre-reloc for uart instances
Uarts already have u-boot,dm-pre-reloc via zynqmp.dtsi that's why there is
no need to have them in platform DT files too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
653736c243 zynqmp: Pass bl32 entry to TF-A via xilinx handoff structure
There is need to pass entry about secure OS when bl32_entry is defined.
Currently only 64bit support is added but /fit-images node have been
extended to also record if this is 32bit or 64bit secure OS. When this is
tested the code will be update to support this configuration too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
84c88d6ef2 zynqmp: Generate u-boot.its also with TEE dynamically
The first change is to trying to find out TF-A load address based on
reading elf file. Expectation is that bl31.bin is in the same folder as
bl31.elf. It brings new flexibility to place TF-A to any address (DDR
included).

And also enable TEE generation also with TEE configuration.
Expecation is the same as above that tee.bin and tee.elf are in the same
folder.

User has to just define link to BL31/BL32 binary files and the rest should
be handled by the script.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
ce39ee28ec zynqmp: Do not place u-boot to reserved memory location
TF-A and SecureOS can allocate the part of DDR for self but U-Boot is not
handling this configuration that the part of memory is reserved and
shouldn't be used by U-Boot. That's why read all reserved memory locations
and don't use it.
The code was taken from commit 4a1b975dac ("board: stm32mp1: reserve
memory for OP-TEE in device tree") and commit 1419e5b516 ("stm32mp:
update MMU config before the relocation") which is used by stm32 and does
the job properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
43ef4c82fe zynqmp: Enable regulators
Enable command and fixed regulators. XDP platform is using them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
447fb8db02 arm64: zynqmp: Update Copyright years to 2021
Trivial change for all files I have touched recently.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
eca0376b54 arm64: zynqmp: Add label for zynqmp_ipi
Add label which is used by bootloader for adding bootloader specific flag.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3dc8416abdd3498e61edcd83830a12af295c5c6d.1611224800.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michal Simek
f2b5dd38de arm64: zynqmp: Move DP nodes to the end of file (zcu106)
Just sync it with others for easier comparison.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
fee3e307f2 arm64: zynqmp: Add reset description for sata
Sata needs to get reset before configuration that's why add property for it
there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Stefano Stabellini
ce42bd2fa3 arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsi
The SMMU is disabled in device tree so this change has no impact.
The benefit is that this way it is in sync with xen.dtsi. Xen enables
the SMMU and makes use of it.

Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
d9be8b4f2f arm64: zynqmp: Disable CCI by default
There is no reason to have CCI no enabled by default. Enable it when your
system configuration requires it. In Xilinx configuration flow this is
work for Device Tree Generator which reads information from HW Design
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
1242a6b13d arm64: zynqmp: Update psgtr clocks index for boards
Update the psgtr clock indexing for couple of zynqmp boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
476588c9b4 arm64: zynqmp: Handle MMC seq number based on boot device
K26 has EMMC and SD and default 0 is not working when system is booting out
of SD which is controller 1. Add controller autodetection via
mmc_get_env_dev(). The same code is used for distro_boot selection done in
board_late_init(). bootseq variable can't be reused because this is called
so late.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
02ac1553b8 arm64: zynqmp: Add psu_init_gpl for k26 boards
Add psu_init_gpl file for getting SPL to work directly from the tree.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
767aa16d41 ARM: zynq: Rename bus to be align with simple-bus yaml
Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI
point-to-point channels for communicating addresses, data, and response
transactions between master and slave clients. This ARM AMBA 3.0..."

Issues are reported as:
.. amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>From schema:
../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml

Similar change has been done for Xilinx ZynqMP SoC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michal Simek
351b9f5f95 arm64: zynqmp: Enable gpio driver for zcu1275/zcu1285
Enable gpio driver on these boards. GPIOs can be used on any board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
ddf8deabc3 arm64: zynqmp: Add support for SVD devices
SVDs  are using different name which can't be handled via zynqmp_devices
structure. That's why introduce zynqmp_detect_svd_name() which checks ID
code for these devices and show proper name for them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
ab09e16d5a arm64: zynqmp: Enable EFI secure boot
Enabling EFI secure boot which is required for EBBR specification.
Enabling this will fix
"RT.SetVariable - Create one Time Base Auth Variable, the expect return
status should be EFI_SUCCESS"

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
T Karthik Reddy
122ca834f2 arm64: xilinx: Set CONFIG_ZYNQMP_FIRMWARE config for mini emmc
CONFIG_ZYNQMP_FIRMWARE enables zynqmp firmware driver.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2021-06-23 09:48:35 +02:00
Ashok Reddy Soma
aee1ed87e7 arm64: zynqmp: Fix application loading on R5 core1
From U-Boot, loading application on RPU core 0 is fine but loading on
core 1 is not handled properly. Lock-step mode needs both the R5 cores
to be initialized and it is working fine. Whereas in SPLIT mode individual
R5 cores needs to be initialized as they need to execute differenet
applications. Handle both these lock-step and split modes by propagating
mode and RPU core number(4 for RPU0 and 5 for RPU1) for various functions
and by adding conditions in those functions.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
e246dc49cf ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
The Linux commit f69629919942 ("dt-bindings: sram: Convert SRAM bindings to
json-schema") converted binding to yaml and some missing required
properties started to be reported. Align binding based on it.

The patch is fixing these warnings:
.../zynq-zc702.dt.yaml: sram@fffc0000: '#address-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: '#size-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: 'ranges' is a required property
>From schema: .../Documentation/devicetree/bindings/sram/sram.yaml

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/87c02786ccd8d7827827a9d95a8737bb300caeb0.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michal Simek
742fdd1e6b ARM: zynq: Convert at25 binding to new description on zc770-xm013
The Linux commit f8f79fa6bb25 ("dt-bindings: at25: convert the binding
document to yaml") converted binding to yaml and 3 deprecated properties
pop up.

The patch is fixing these warnings:
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'pagesize' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'size' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'address-width' is a required property
>From schema: .../Documentation/devicetree/bindings/eeprom/at25.yaml

by converting them to new binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/be2c1125d98386033e182012eb08986924707a76.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Jorge Ramirez-Ortiz
01c7714a7b zynqmp: spl: support DRAM ECC initialization
Use the ZDMA channel 0 to initialize the DRAM banks. This avoid
spurious ECC errors that can occur when accessing unitialized memory.

The feature is enabled by setting the option
CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT and providing the following data:

 SPL_ZYNQMP_DRAM_BANK1_BASE: start of memory to initialize
 SPL_ZYNQMP_DRAM_BANK1_LEN : len of memory to initialize (hex)
 SPL_ZYNQMP_DRAM_BANK2_BASE: start of memory to initialize
 SPL_ZYNQMP_DRAM_BANK2_LEN : len of memory to initialize (hex)

Setting SPL_ZYNQMP_DRAM_BANK_LEN to 0 takes no action.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
ca8bb0ccb7 gpio: pca953x: Add missing i2c dependency
pca953x also depends on i2c that's why add dependency to Kconfig.
Where GPIO is enabled but I2C compilation error pops up.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-06-23 09:48:35 +02:00
Bin Meng
1ce892cb1c azure: Use msys2 20210604 installer for Windows build
MSYS2 Windows build started to fail since yesterday (Jun 21):

  checking keyring...
  checking package integrity...
  error: gcc-libs: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
  :: File /var/cache/pacman/pkg/gcc-libs-10.2.0-1-x86_64.pkg.tar.zst is corrupted (invalid or corrupted package (PGP signature)).
  error: gcc: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
  :: File /var/cache/pacman/pkg/gcc-10.2.0-1-x86_64.pkg.tar.zst is corrupted (invalid or corrupted package (PGP signature)).
  error: failed to commit transaction (invalid or corrupted package)
  Errors occurred, no packages were upgraded.

Switching to the latest installer (version 20210604) seems to fix it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com>
2021-06-22 09:06:03 -04:00
Tom Rini
97c8cb524c Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net 2021-06-18 11:18:56 -04:00
Tim Harvey
54c321f9de net: octeontx: smi: use dt live tree API
clean up octeontx_smi_probe by using the live-tree API.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18 11:29:17 +03:00
Dimitri John Ledkov
75efe7dc99 cmd: pxe_utils: sysboot: fix crash if either board or soc are not set.
If the environment does not have "soc" or "board" set, and fdtdir
option is specified in extlinux.conf, the bootloader will crash whilst
dereferencing a null pointer. Add a guard against null soc or
board. Fixes a crash of qemu-riscv64_smode configuration, which does
not have CONFIG_SYS_SOC defined.

Signed-off-by: Dimitri John Ledkov <xnox@ubuntu.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18 11:29:17 +03:00
Michael Walle
82a3c9ef20 net: use the same alias stem for ethernet as linux
Linux uses the prefix "ethernet" whereas u-boot uses "eth". This is from
the linux tree:

$ grep "eth[0-9].*=.*&" arch/**/*dts{,i}|wc -l
0
$ grep "ethernet[0-9].*=.*&" arch/**/*dts{,i}|wc -l
633

In u-boot device trees both prefixes are used. Until recently the only
user of the ethernet alias was the sandbox test device tree. This
changed with commit fc054d563b ("net: Introduce DSA class for Ethernet
switches"). There, the MAC addresses are inherited based on the devices
sequence IDs which is in turn given by the device tree.

Before there are more users in u-boot and both worlds will differ even
more, rename the alias prefix to "ethernet" to match the linux ones.
Also adapt the test cases and rename any old aliases in the u-boot
device trees.

Cc: David Wu <david.wu@rock-chips.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-18 11:29:17 +03:00
Michael Walle
6e424b4aca net: use a more deterministic approach to get the active ethernet device
If the environment variable "ethact" is not set, the first device in the
uclass is returned. This depends on the probing order of the ethernet
devices. Moreover it is not not configurable at all.

Try to return the ethernet device with sequence id 0 first which then
can be configured by the aliases in a device tree. Fall back to the old
mechanism in case of an error.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18 11:29:17 +03:00
Heinrich Schuchardt
02036d90ec net: sun8i-emac: fix MDIO frequency
Commit 4f0278dac5 ("net: sun8i-emac: Lower MDIO frequency") leads to
network failure on the OrangePi PC.

    => dhcp
    sun8i_emac_eth_start: Timeout

According to the commit message the change of the MDIO frequency is only
required for external PHYs.

Fixes: 4f0278dac5 ("net: sun8i-emac: Lower MDIO frequency")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-06-18 11:29:17 +03:00
Jassi Brar
eab447b2b5 net: synquacer: Add netsec driver
Add SynQuacer's NETSEC GbE controller driver.
Since this driver will load the firmware from SPI NOR flash,
this depends on CONFIG_SYNQUACER_SPI=y.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18 11:29:17 +03:00
Daniil Stas
f024e0b208 net: dwc_eth_qos: Revert some changes of commit 3a97da12ee
Revert some changes of commit 3a97da12ee ("net: dwc_eth_qos: add dwc
eqos for imx support") that were probably added by mistake.

One of these changes can lead to received data corruption (enabling
FUP and FEP bits). Another causes invalid register rxq_ctrl0 settings
for some platforms. And another makes some writes at unknown memory
location.

Fixes: 3a97da12ee ("net: dwc_eth_qos: add dwc eqos for imx support")
Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Ye Li <ye.li@nxp.com>
Cc: Fugang Duan <fugang.duan@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18 11:29:17 +03:00
Daniil Stas
07292f8e51 net: dwc_eth_qos: Fix needless phy auto-negotiation restarts
Disabling clk_ck clock leads to link up status loss in phy, which
leads to auto-negotiation restart before each network command
execution.

This issue is especially big for PXE boot protocol because of
auto-negotiation restarts before each configuration filename trial.

To avoid this issue don't disable clk_ck clock after it was enabled.

Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>

Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18 11:29:17 +03:00
Tim Harvey
7001863596 net: e1000: do not attempt to set hwaddr for i210 without FLASH
commit f1bcad22dd ("net: e1000: add support for writing to EEPROM")
adds support for storing hwaddr in EEPROM however i210 devices do not
support this and thus results in errors such as:
Warning: e1000#0 failed to set MAC address'

Check if a flash device is present and if not return -ENOSYS indicating
this is not supported.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18 11:29:17 +03:00
Hou Zhiqiang
3e1848778c Fix a memory leak issue in the RX port initialization.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18 11:29:17 +03:00
Tom Rini
a298d4fbcd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- fsl-qoriq: Bug fixes related pfe, eth, thermal node, vid.c, cpu release,
  mmc, usb, env, etc for Layerscape boards
- powerpc: Update Maintainers for some boards.
2021-06-17 08:44:56 -04:00
Tom Rini
7e585b5a61 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
- ae350 related dts fixes.
2021-06-17 08:44:23 -04:00
Priyanka Jain
b7efcaff8b board: freescale: t1028xrdb: Add MAINTAINER for revD
Add Priyanka Jain as MAINTAINER for
 T2080RDB_revD_defconfig,
 T2080RDB_revD_NAND_defconfig,
 T2080RDB_revD_SDCARD_defconfig and
 T2080RDB_revD_SPIFLASH_defconfig

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 12:52:54 +05:30
Ran Wang
390c73b417 armv8: Update erratum number to align with doc
Change the USB erratum number A-050106 to A-050204 as A-050106 is
a duplicate and never be published.

Fixes 0cfa00cdb9 (“armv8: Add workaround for USB erratum A-050106”)
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Camelia Groza
13ea307f79 board: freescale: t208xrdb: add a config option for rev D dts fixups
Under DM, we rely on u-boot's device tree to provide the correct PHY
addresses. The board_fix_fdt callback is intended to be used for
device tree fixups before relocation. Unfortunately, this isn't an
option when booting from flash since the device tree isn't writable
before relocation.

This patch introduces the CONFIG_T2080RDB_REV_D option to signal that a
board revision D or up is the target. The config option is used to set
the correct Aquantia PHY address in the board's u-boot device tree.

Defconfig files with the option enable explicitly are added for
convenience.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Camelia Groza
4e21a555c1 board: freescale: t208xrdb: add Linux fdt fix-ups for rev D
The T2080RDB boards revisions D and up have updated 10G Aquantia PHYs
connected to MAC1 and MAC2. The second Aquantia PHY is located at a
different address on the MDIO bus compared to rev C (0x8 instead of 0x1).

Fix-up the Linux device tree to update the PHY address for the second
Aquantia PHY on boards revisions D and up. Also rename the PHY node to
reflect the changes.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Camelia Groza
c91b130554 board: freescale: t208xrdb: detect the board revision version
Detect and print the board revision version based on the CPLD registers.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Camelia Groza
a484f7c486 board: freescale: t208xrdb: remove the legacy non-DM_ETH code
Both DM_ETH and DM_PCI are enabled for the T2080RDB board. Remove the
board_eth_init() callback and the non-DM_ETH code paths since they are not
needed anymore.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Aleksandar Gerasimovski
11eeeef7b0 pg-wcom-ls102xa: fix sys counter frequency
A system clock of 66MHz was chosen for the pg-wcom-ls102xa.
Compared to the Evalboard, this corresponds to a reduction of 1/3.
The system counter clock should have been reduced accordingly,
but that was not the case, so we had a system time that was
1/3 behind the real time.

This patch corrects the system counter clock to
8.333MHz = 66.667MHz / 8.

Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Aleksandar Gerasimovski
02802eb89e pg-wcom-ls102x: initialize front led and app buf
This patch adds the front led initialization and the application
buffer enable to the eraly board inititlaization.

Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Aleksandar Gerasimovski
ccbd2ced73 km: ls102x: update device disable configuration acc hw design desc
In order to improve power consumption ls102x allows to disable peripherals
that are not in use.
This patch follows SELI8 HW design description and disables peripherals
that are not in use in our designs, the same configuration is applicable
and for EXPU1.

This patch uses available hwconfig option for updating ls102x device
disable configuration.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Aleksandar Gerasimovski
fd49502d0f km: ls102x: set ethrotate envvar to no
The default behavior in the latest u-boot revisions is to rotate the
active net device to the next available if the requested link is not
established.

For our ls102x based devices this would mean that if active debug net
device is not available, u-boot will rotate and set the next net device
that is one of the estar adapters.
To return from this situation manual action to set correct ethact
adapter will be needed and this can be annoying when working in
debug mode.

Setting ethrotate=no will disable net adapter rotation and will make sure
that the primary adapter is always used.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30