Commit graph

19724 commits

Author SHA1 Message Date
Sean Anderson
13fc44e222 spi: dw: Rename "cs-gpio" to "cs-gpios"
This property is named differently than other SPI drivers with the same
property, as well as the property as used in Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:36 +05:30
Andy Shevchenko
f89e8acbc8 x86: edison: Switch to DM_USB_GADGET
DM is the modern default approach for the drivers in U-Boot.
It also allows to configure code via Device Tree.

Move Intel Edison to use DM_USB_GADGET and drop hard coded values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:51:24 +08:00
Andy Shevchenko
23cdbba8b1 x86: edison: Use dwc3-generic driver for Intel Edison
Use generic Synopsys DesignWare 3 driver on Intel Edison.
For now it's just a stub which allows future refactoring.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:51:24 +08:00
Andy Shevchenko
d067fb7636 x86: edison: BINMAN selection is specific to the board
The platforms based on Intel Tangier may have different requirements
how to create bootloader bundle to supply to a device. Currently
the BINMAN approach is for Intel Edison only.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:50:42 +08:00
Andy Shevchenko
35d29a8f55 x86: edison: Add CPU to compatible string
Like in the rest of x86 boards append CPU to the board compatible string.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:50:03 +08:00
Andy Shevchenko
21096c0af3 x86: tangier: Find proper memory region for relocation
It appears that U-Boot works by luck on Intel Edison board because the amount
of RAM is less than 1 GB and standard way of calculating the top of it work
for this configuration. However, this won't work if the amount of RAM is
different and split differently in address space. We have to find the suitable
window correctly.

Find proper memory region for relocation by scanning MMAP SFI table in
board_get_usable_ram_top() callback.

According to the address map documentation the Main Memory is guaranteed to lie
in the 0..2 GB range, that's why we limit search by this range.

Fixes: e71de54a49 ("x86: Add Intel Tangier support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:47:34 +08:00
Simon Glass
6c9a83502f x86: zimage: Update cmdline parameter to be an env var
With the updated changes to bootargs substitution[1], the zboot command
needs to be updated to get its command line from an environment variable
instead of a memory address. This is because the command-line string must
be updated to convert %U to ${uuid}, etc.

In any case it is more flexible to use a environment variable and it is
best to do this before the release to avoid a subsequent change.

Update the command accordingly.

[1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:46:11 +08:00
Leo Yu-Chi Liang
9afaeec6ef riscv: Complete efi header for RV32/64
This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Add fields to complete Optional Header "Data Directories" specified in the document.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-12-14 15:16:54 +08:00
Leo Yu-Chi Liang
9ea6952a9a riscv: Fix efi header size for RV32
This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Modify the size of the Optional Header "Windows-Specific Fields" to fit with the specification.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
2020-12-14 15:16:54 +08:00
Atish Patra
84c3db2ea3 riscv: Fix efi header for RV32
RV32 should use PE32 format instead of PE32+ as the efi header format.
This requires following changes
1. A different header magic value
2. An additional parameter known as BaseOfData. Currently, it is set to
   zero in absence of any usage.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-12-14 15:16:54 +08:00
Heinrich Schuchardt
c353f2b845 riscv: reset after crash
If an exception occurs on ARM or x86, we call panic() which will try to
reset the board. Do the same on RISC-V.

To avoid -Werror=format-zero-length move a '\n' to the string passed to
panic. We don't need a message here as depending on CONFIG_PANIC_HANG we
will either see

    ### ERROR ### Please RESET the board ###

or

    resetting ...

as next message.

Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-14 15:16:41 +08:00
Brad Kim
fb33eaa3a2 riscv: fix the wrong swap value register
Not s2 register, t1 register is correct
Fortunately, it works because t1 register has a garbage value

Signed-off-by: Brad Kim <brad.kim@semifive.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
Reviewed-by: Leo Liang <ycliang@andestech.com>
2020-12-14 15:16:34 +08:00
Tom Rini
5a1a8a63be Second set of u-boot-atmel fixes for 2021.01 cycle
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Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel fixes for 2021.01 cycle

This set includes very important fixes for: MMC booting on several
boards, drive strength on sam9x60ek mmc lines, compile issues for
timer.c old driver, removal of unwanted access to sam9x60 bit for
oscillator bypass mode, and eeproms read on sama5d2_icp.
2020-12-11 15:55:17 -05:00
Eugen Hristev
bb5eedbc7f ARM: dts: at91: sama5d2_icp: fix i2c eeprom compatible
The correct compatible for this eeproms is microchip,24aa02e48
The previous compatible string was working up to U-boot 2020.04.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
2020-12-11 17:47:21 +02:00
Aleksandar Gerasimovski
2ef53647d1 arm: ls102xa: select USB PHY erratum's only if USB is enabled
The USB support is not by default enabled on all designs, so it does not
make seance to have USB specific erratum's enabled on such a designs.

On our internal Hitachi-Powergrids design not using the USB controller
there is a crash when accessing those specific memory locations selected
by the erratum flags.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Chris Packham
0606bf2b7c powerpc: mpc85xx: Allow boards to override CONFIG_USB_MAX_CONTROLLER_COUNT
If the board isn't strapped to enable USB1 then attempting to access it
will result in a hang. Avoid this by allowing boards to define
CONFIG_USB_MAX_CONTROLLER_COUNT.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Alban Bedel
cbf77d2018 armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A
When booting from TF-A there is a logic that attempt to detect if the
default environment is used, if this is the case it then set the
`bootcmd` and `mcinitcmd` depending of the device we booted from.
This detection logic is dubious as it access internals of the env
implementation and it doesn't always work correctly.

First of all it detect any valid environment as not being the
default, so after running `env default -a && saveenv` the board
doesn't boot anymore as `bootcmd` is then empty.
But it also fails in some other ways, for example it always detect a
default environment when redundant env is enabled on MMC, so in that
case `bootcmd` is overwritten on every boot.

Instead of increasing the complexity of the detection just check if
`bootcmd` and `mcinitcmd` are set in the environment and set them if
they are not.

Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Priyanka Singh
03d095e87d layerscape: fdt.c: Check for NULL return value from fdt_getprop()
Check for NULL return value from fdt_getprop() in
fdt_fixup_remove_jr()

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
[Fixed checkpatch errors/warnings]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal
9ed303dfa9 armv8: lx2162aqds: Add support for LX2162AQDS platform
This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: hui.song <hui.song_1@nxp.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal
3a187cff7a armv8: lx2162a: Add Soc changes to support LX2162A
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.

LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
4c72d2d53b arm: dts: ls1028a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
04c2d93d36 arm: dts: ls1043a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
6ba8b6a8f8 arm: dts: ls1012a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
7dfc20ab1d arm: dts: ls1088a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
ba45dd21f3 arm: dts: ls2080a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
2adb7970cb arm: dts: ls1046a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
6519ccd282 arm: dts: lx2160a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:38 +05:30
Tom Rini
2a42de6df1 - Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
 - Enable internal pull-ups for SDMMC1 on DHCOM SoM
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Merge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
2020-12-09 11:36:41 -05:00
Marek Vasut
9b36b7dc96 ARM: dts: stm32: Add USB OTG ID pin on DH AV96
Add USB OTG ID pin mux and switch the USB OTG port
from peripheral to OTG mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
1399be91cb ARM: dts: stm32: Enable SDMMC3 on DH DRC02
The DH DRC02 board has an on-board microSD slot,
add DT properties to enable the slot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
75df748b87 ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
845c6720ec ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Patrice Chotard
0f8106f8e0 treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Tom Rini
19ea606109 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imx 2020-12-08 09:53:03 -05:00
Tom Rini
ec79f5ce22 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
  threshold configuration (Joshua)
2020-12-07 11:46:12 -05:00
Pali Rohár
135973967b arm: mvebu: Espressobin: Add support for emmc into dts file
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.

Code for emmc is extracted from commit f1a43c84a9 ("arm64: dts: a3720:
add support for espressobin with populated emmc").

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
2020-12-07 07:11:37 +01:00
Pali Rohár
c5c4b69857 Revert "arm64: dts: a3720: add support for espressobin with populated emmc"
This reverts commit f1a43c84a9.
2020-12-07 07:11:37 +01:00
Pali Rohár
338c5ee26a Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"
This reverts commit 03bb6a9b1e.
2020-12-07 07:11:37 +01:00
Joshua Scott
28f0cbcdd2 arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.

As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.

Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-07 07:11:37 +01:00
Marcel Ziswiler
2f36a693e3 imx8: allow overriding memory layout
Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
a51fdba3fa board: toradex: add apalis-imx8x 2gb wb it v1.1a module support
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].

Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial@5a070000
Out:   serial@5a070000
Err:   serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net:   eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot:  0

Functionality wise the following is known to be working:
  - eMMC and MMC/SD card
  - Ethernet (*)
  - GPIOs
  - I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.

[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
3d1103cefc ARM: dts: fsl-imx8qxp-apalis: add initial device tree
Introduce initial hierarchy of device trees for Apalis iMX8X
System on Module.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Tim Harvey
bc479b2118 imx8m: fix cache setup for dynamic sdram size
the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
caafc6c497 ARM: dts: imx8mm-verdin: follow changed pmic
The used PMIC has been changed from RHOM BD71837 to NXP PCA9450A.
Adjust the device tree accordingly.
Remove the old ADC node as the ADC has been changed and has no longer
a separate power rail.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Ian Ray
559aaa2526 board: ge: reduce VPD EEPROM partition size
Reduce vital product data size to match the latest specification.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:37 +01:00
Oliver Graute
b15cd88b22 imx: ahab: fix implicit declaration warning
Fix the following warning:

arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration]
   flush_dcache_range(s, e);
   ^~~~~~~~~~~~~~~~~~

Include cpu_func.h header which declares the flush_dcache_range()
function.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
492b728f9f imx: ahab: fix compiler warnings in debug
arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’:
arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type
‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=]
   debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",

Fix those by using "%lu" specified.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
f4433e7f27 imx: ahab: Fix compiler warnings in printf
arch/arm/mach-imx/imx8/ahab.c:110:63: warning: format ‘%x’ expects
argument of type ‘unsigned int’, but argument 2 has type ‘u64 {aka long
long unsigned int}’ [-Wformat=]

Fix those by using %llx

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Heiko Schocher
68163c3bf0 arm: dts: aristainetos: sync with changes in linux
sync with comaptible changes in linux from
Krzysztof Kozlowski.

https://patchwork.kernel.org/project/linux-arm-kernel/patch/20200930190143.27032-12-krzk@kernel.org/

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-12-06 15:07:35 +01:00
Heiko Schocher
015c026f7a imx6: add support for aristainetos2c_cslb board variant
add support for aristainetos2c_cslb board variant.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-12-06 15:07:06 +01:00