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ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock

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The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This commit is contained in:
Marek Vasut 2020-12-01 11:29:18 +01:00 committed by Patrick Delaunay
parent 845c6720ec
commit 75df748b87
1 changed files with 0 additions and 1 deletions
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arch/arm/dts/stm32mp15xx-dhcom.dtsi
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@ -333,7 +333,6 @@
disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
status = "okay";