Commit graph

17661 commits

Author SHA1 Message Date
Angelo Durgehello
ad42093755 m68k: add dm fec support
Add architecture-related code for dm fec support.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10 10:25:13 -05:00
Angelo Durgehello
0dac80110c m68k: add fec fdt overrides to all boards
Add ethernet controller overrides for all involved boards.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10 10:07:25 -05:00
Angelo Durgehello
04e5dd5115 m68k: add fec base node to devicetrees
Add basic ethernet controller devicetree nodes for all ColdFire
families.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2020-01-10 10:07:25 -05:00
Tom Rini
c00bd81ae0 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xx
- A small PR with MC8309 fixes from Rasmus.
2020-01-09 13:42:43 -05:00
Tom Rini
d6b92b9742 dm: Increased separation of ofdata_to_platdata() and probe methods
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Merge tag 'dm-pull-8jan20' of git://git.denx.de/u-boot-dm

dm: Increased separation of ofdata_to_platdata() and probe methods
2020-01-09 08:52:21 -05:00
Tom Rini
7086de4948 Pull request for UEFI sub-system for efi-2020-04-rc1
This pull request provides:
 
 * support for FIT images for UEFI binaries
 * drivers for hardware random number generators
 * an implementation of the EFI_RNG_PROTOCOL
 * a sub-command for efidebug to display configuration tables
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Merge tag 'efi-2020-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-04-rc1

This pull request provides:

* support for FIT images for UEFI binaries
* drivers for hardware random number generators
* an implementation of the EFI_RNG_PROTOCOL
* a sub-command for efidebug to display configuration tables
2020-01-08 18:57:11 -05:00
Tom Rini
21aede21b0 UniPhier SoC updates for v2020.04
- add pinmux nodes for I2C ch5, ch6
 
 - enable SPI driver and command
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Merge tag 'uniphier-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier

UniPhier SoC updates for v2020.04

- add pinmux nodes for I2C ch5, ch6

- enable SPI driver and command
2020-01-08 15:25:13 -05:00
Tom Rini
deb287b561 ---------------------------------------------------------------------
Add i.MX8MP SoC and EVK board
 Update README for i.MX8MN EVK and fix mmc env
 Add pca9450 driver
 --------------------------------------------------------------------
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
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Merge tag 'u-boot-imx-20200108' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

---------------------------------------------------------------------
Add i.MX8MP SoC and EVK board
Update README for i.MX8MN EVK and fix mmc env
Add pca9450 driver
--------------------------------------------------------------------

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
2020-01-08 15:24:50 -05:00
Tom Rini
ce022f2857 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2020-01-08 15:23:49 -05:00
Tom Rini
9af51fb3a5 - Khadas VIM3L based on Amlogic S905D3 support
- Various fixups for amlogic boards
 - Unnecessary header includes drop into video/meson
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Merge tag 'u-boot-amlogic-20200108' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Khadas VIM3L based on Amlogic S905D3 support
- Various fixups for amlogic boards
- Unnecessary header includes drop into video/meson
2020-01-08 15:23:37 -05:00
Masahiro Yamada
49a7282d76 ARM: dts: uniphier: add pinmux nodes for I2C ch5, ch6
The next generation SoC can connect on-board slave devices via
I2C ch5 and ch6.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-09 01:57:05 +09:00
Peng Fan
439321b264 imx: add i.MX8MP EVK board
Add basic i.MX8MP EVK board support

U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT:   Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)

CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM:  6 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
234187e2bc imx: imx8m: add imximage-8mp-lpddr4.cfg
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
19957ee33d imx: imx8m: only support non-dm code in clock_imx8mm.c
The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
9d5e1aa78b imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP
i.MX8MP ROM support ROMAPI as i.MX8MN, so make
SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
20cd453f97 imx: add i.MX8MP PE property
i.MX8MP does not have LVTTL, it has a PE property

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
b7590fc43c imx: imx8mp: add pin header file
Add pin header file for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
c86987d067 arm: dts: freescale: Add i.MX8MP dtsi support
The i.MX8M Plus Media Applications Processor is part of the growing
mScale family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in Samsung 14LPP to achieve both
high performance and low power consumption and relies on a powerful
fully coherent core complex based on a quad core ARM Cortex-A53 cluster
and Cortex-M7 low-power coprocessor, audio digital signal processor,
machine learning and graphics accelerators.

Add the basic dtsi support for i.MX8MP.

Patch from Anson Huang for Kernel
https://patchwork.kernel.org/patch/11310915/

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
e997d30be8 imx: imx8m: add 1GHz fracpll entry
4000MTS DDR needs 1GHz fracpll, so add the entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
db4510ff8e imx: imx8mp: add basic clock
i.MX8MP has similar architecture as i.MX8MN, but it has different
clk root and index, so add that to make i.MX8MP could use
the non-dm clock driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
d857a6a697 arm: dts: add i.MX8MP pinfunc header
Add i.MX8MP pinfunc header for dts usage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
7df6397eb4 imx: spl: support i.MX8MP spl_boot_device
i.MX8MP follows i.MX8MN, so just let it use spl_board_boot_device

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
de749aecbb imx: imx8m: add Kconfig entry for i.MX8MP
Add Kconfig entry for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
13868eaf06 imx: cpu: enlarge bit mask to 0x1FF for cpu type
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest
bit, so enlarge bit mask to 0x1FF to make it could detect
cpu type correctly

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
a07c718129 imx8mp: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
625b03d810 imx: get cpu id/type of i.MX8MP
Support get i.MX8MP cpu id and cpu type

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
392a4e6dd3 imx: imx8mq: handle ESDHC in mxc_get_clock
fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK +
dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK
as root clk and cause sd card could not be detected in U-Boot proper,
as below:
"Loading Environment from MMC... unable to select a mode"

Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Fabio Estevam <festevam@gmail.com>
2020-01-08 13:18:55 +01:00
Rasmus Villemoes
42a13a0b9f mpc83xx: set MPC83XX_GPIO_CTRLRS to 2 for MPC8309
The MPC8309 has two gpio controllers (which is already correctly
reflected in its struct immap definition).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:14:20 +01:00
Rasmus Villemoes
375d817d9e mpc83xx: immap_83xx: add spi8xxx_t in immap for mpc8309
Allow drivers/spi/mpc8xxx_spi.c to be built for an mpc8309 target.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:14:14 +01:00
Rasmus Villemoes
a3c1e0e067 powerpc: mpc83xx: convert CONFIG_FSL_ELBC to Kconfig
This complements commit 068789773d which did the conversion for
mpc85xx.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:14:09 +01:00
Rasmus Villemoes
392b385d9d mpc83xx: make ARCH_MPC8309 select SYS_FSL_ERRATUM_ESDHC111
The mpc8309 is also affected by the "Manual Asynchronous CMD12 abort
operation causes protocol violations" erratum, though it is enumerated
as eSDHC16 in the errata sheet for mpc8309.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
2020-01-08 08:12:35 +01:00
Simon Glass
dc12ebbbdb dm: test: Add a test driver for devres
Add a driver which does devres allocations so that we can write tests for
devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:39 -07:00
Simon Glass
3d9acea3d9 x86: apl: Avoid accessing the PCI bus before it is probed
The PCI bus is not actually probed by the time the ofdata_to_platdata()
method is called since that happens in the uclass's post_probe() method.
Update the PMC and P2SB drivers to access the bus in its probe() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-07 16:02:38 -07:00
Sughosh Ganu
ff0dada9b8 sandbox: rng: Add a random number generator(rng) driver
Add a sandbox driver for random number generation. Mostly aimed at
providing a unit test for rng uclass.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-07 18:08:21 +01:00
Fabien Dessenne
7bff971a14 stm32mp1: reset coprocessor status at cold boot
Reset ResourceTableAddress and CoprocessorState at cold boot, preserve
these values at standby wakeup.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-07 11:13:25 -05:00
Fabien Dessenne
ee16c9a60b stm32mp1: declare backup registers for coprocessor
Use the backup register #17 as coprocessor resource table address and
backup register #18 as coprocessor state.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-07 11:13:25 -05:00
Anand Moon
262d343633 board: amlogic: select PWRSEQ for all amlogic platform
commit a10388dc69 ("mmc: meson-gx: add support for mmc-pwrseq-emmc")
introduce CONFIG_PWRSEQ for power sequence for eMMC module on
amlogic platform, so enable this to all amlogic boards.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-01-07 14:50:41 +01:00
Tom Rini
d8a3f5259a New for 2020.04
---------------
 
 - New boards
 	Embedded Artists COM board
 	Xea Board
 - Switch to DM:
 	Aristainetos boards
 	Toradex colibri (DM_ETH)
 	iCubox
 	GE bx50v3
 	mx7dsabre (DM_ETH)
 	cx9020
 - New features:
 	Bootaux with elf files
 	Default SYS_THUMB_BUILD for i.MX6/7
 - Fixes:
 	DHCOM i.MX6 PDK
 	Engicam
 	i.MX8M tools (imx8m_image)
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/633679664
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Merge tag 'u-boot-imx-20200107' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

New for 2020.04
---------------

- New boards
	Embedded Artists COM board
	Xea Board
- Switch to DM:
	Aristainetos boards
	Toradex colibri (DM_ETH)
	iCubox
	GE bx50v3
	mx7dsabre (DM_ETH)
	cx9020
- New features:
	Bootaux with elf files
	Default SYS_THUMB_BUILD for i.MX6/7
- Fixes:
	DHCOM i.MX6 PDK
	Engicam
	i.MX8M tools (imx8m_image)

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/633679664
2020-01-07 08:45:43 -05:00
Tom Rini
ac0f978afd First set of u-boot-atmel features for 2020.04 cycle
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Merge tag 'u-boot-atmel-2020.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features for 2020.04 cycle

This feature set is a patch series from Tudor Ambarus which includes
parsing of the spi flash SFDP parser for SST flashes, and using those
tables to retrieve unique saved per device MAC address. This is then
used as base mac address on the SAMA5D2 Wireless SOM EK board.
2020-01-07 08:44:56 -05:00
Thor Thayer
62079b2211 arm: socfpga: stratix10: Enable SMMU access
Enable TCU access through the Stratix10 CCU so that the
SMMU can access the SDRAM.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-01-07 14:38:34 +01:00
Ley Foon Tan
a76b711dea arm: socfpga: agilex: Enable Agilex SoC build
Add build support for Agilex SoC.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:34 +01:00
Ley Foon Tan
fb3862823b arm: dts: agilex: Add base dtsi and devkit dts
Add device tree files for Agilex SoC platform.

socfpga_agilex-u-boot.dtsi and socfpga_agilex_socdk-u-boot.dts contains
Uboot specific DT properties.

socfpga_agilex.dtsi and socfpga_agilex_socdk.dts are from Linux
(kernel/git/dinguyen/linux.git, commit 6f0bf971bacacc)

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:34 +01:00
Ley Foon Tan
594cacf063 arm: socfpga: agilex: Add SPL for Agilex SoC
Add SPL support for Agilex SoC.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
a6e5b06bea arm: agilex: Add clock handoff offset for Agilex
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
b4a20cb300 arm: socfpga: agilex: Add clock wrapper functions
Add clock wrapper functions call to clock DM functions to get clock
frequency and used in cm_print_clock_quick_summary().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
c168fc71a3 clk: agilex: Add clock driver for Agilex
Add clock manager driver for Agilex. Provides clock initialization
and get_rate functions.

agilex-clock.h is from Linux commit ID cd2e1ad12247.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
20322cea64 arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz
CLKMGR_INTOSC_HZ should be 400MHz, instead of 460MHz.
Removed also unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
38229994af arm: socfpga: Move Stratix10 and Agilex clock manager common code
Move Stratix10 and Agilex clock manager common code to new header file.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
975f66bb57 arm: socfpga: agilex: Add system manager support
Add system manager support for Agilex.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
2fd1dc5593 arm: socfpga: Move Stratix10 and Agilex system manager common code
Move Stratix10 and Agilex system manager common code to
system_manager_soc64.h. Changed macros to use SYSMGR_SOC64_*.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00