2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2014-06-26 01:23:30 +00:00
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/*
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* include/configs/alt.h
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* This file is alt board configuration.
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*
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* Copyright (C) 2014 Renesas Electronics Corporation
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*/
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#ifndef __ALT_H
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#define __ALT_H
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2014-11-10 05:34:07 +00:00
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#include "rcar-gen2-common.h"
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2014-06-26 01:23:30 +00:00
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2018-04-23 18:24:16 +00:00
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#define STACK_AREA_SIZE 0x00100000
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2014-06-26 01:23:30 +00:00
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#define LOW_LEVEL_MERAM_STACK \
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2022-05-25 16:16:03 +00:00
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(SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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2014-06-26 01:23:30 +00:00
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/* MEMORY */
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2014-11-10 05:34:07 +00:00
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#define RCAR_GEN2_SDRAM_BASE 0x40000000
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#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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2014-06-26 01:23:30 +00:00
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/* SH Ether */
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2022-12-04 15:13:52 +00:00
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#define CFG_SH_ETHER_USE_PORT 0
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2022-12-04 15:13:50 +00:00
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#define CFG_SH_ETHER_PHY_ADDR 0x1
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2022-12-04 15:13:51 +00:00
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#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
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2022-12-04 15:13:49 +00:00
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#define CFG_SH_ETHER_CACHE_WRITEBACK
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2022-12-04 15:13:48 +00:00
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#define CFG_SH_ETHER_CACHE_INVALIDATE
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2022-12-04 15:13:47 +00:00
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#define CFG_SH_ETHER_ALIGNE_SIZE 64
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2014-06-26 01:23:30 +00:00
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/* Board Clock */
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2018-04-23 18:24:16 +00:00
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2022-12-04 15:03:50 +00:00
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#define CFG_EXTRA_ENV_SETTINGS \
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2019-03-30 07:04:29 +00:00
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"bootm_size=0x10000000\0" \
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"usb_pgood_delay=2000\0"
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2018-04-23 18:24:16 +00:00
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2014-06-26 01:23:30 +00:00
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#endif /* __ALT_H */
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