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global: Migrate CONFIG_SH_ETHER_PHY_MODE to CFG

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Perform a simple rename of CONFIG_SH_ETHER_PHY_MODE to CFG_SH_ETHER_PHY_MODE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-12-04 10:13:51 -05:00
parent 7c480bab14
commit 85b5511708
9 changed files with 9 additions and 9 deletions
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2
include/configs/alt.h
View file

@ -23,7 +23,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

2
include/configs/condor.h
View file

@ -16,7 +16,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

2
include/configs/gose.h
View file

@ -22,7 +22,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

2
include/configs/grpeach.h
View file

@ -19,7 +19,7 @@
/* Network interface */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

2
include/configs/koelsch.h
View file

@ -22,7 +22,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

2
include/configs/lager.h
View file

@ -23,7 +23,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

2
include/configs/porter.h
View file

@ -24,7 +24,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

2
include/configs/silk.h
View file

@ -24,7 +24,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64

2
include/configs/stout.h
View file

@ -28,7 +28,7 @@
/* SH Ether */
#define CONFIG_SH_ETHER_USE_PORT 0
#define CFG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CFG_SH_ETHER_CACHE_WRITEBACK
#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64