2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_ARM=y
|
2021-08-28 01:18:30 +00:00
|
|
|
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
|
|
|
|
CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
|
2021-12-11 19:55:51 +00:00
|
|
|
CONFIG_SYS_ARCH_TIMER=y
|
2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_ARCH_ROCKCHIP=y
|
2019-07-09 13:58:46 +00:00
|
|
|
CONFIG_SYS_TEXT_BASE=0x01000000
|
2020-08-10 19:31:07 +00:00
|
|
|
CONFIG_NR_DRAM_BANKS=2
|
2020-01-22 18:38:00 +00:00
|
|
|
CONFIG_ENV_OFFSET=0x3F8000
|
2021-06-28 14:17:29 +00:00
|
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb"
|
2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_ROCKCHIP_RK3288=y
|
|
|
|
CONFIG_TARGET_EVB_RK3288=y
|
rockchip: rk3288-evb: update SPL_STACK/MALLOC_LEN config with rk3399
Update the SPL_STACK_R_MALLOC_SIMPLE_LEN which also including space for
STACK and the size may not enough when loding FIT image in SPL.
If the size is not enough, you can see log like this when loding FIT:
U-Boot TPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53)
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53 +0800)
Trying to boot from MMC2
And if enable the DEBUG for everyting in SPL, the log will hang at dwmmc
sending CMD16 for 'uboot' loadables binary because this step need a
large stack cost(about 0x2d00).
External data: dst=8400000, offset=72638, size=b3580
Image OS is Trusted Execution Environment
board_fit_config_name_match: rk3288-evb
Selecting config 'rk3288-evb'loadables: 'uboot'
blk_find_device: if_type=6, devnum=1: dwmmc@ff0c0000.blk, 6, 0
blk_find_device: if_type=6, devnum=1: dwmmc@ff0f0000.blk, 6, 1
Sending CMD16
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 10:11:53 +00:00
|
|
|
CONFIG_SPL_STACK_R_ADDR=0x04000000
|
2019-09-25 14:56:28 +00:00
|
|
|
CONFIG_SPL_SIZE_LIMIT=0x4b000
|
2018-06-04 15:57:37 +00:00
|
|
|
CONFIG_DEBUG_UART_BASE=0xff690000
|
|
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
2021-08-23 14:25:31 +00:00
|
|
|
CONFIG_SYS_LOAD_ADDR=0x800800
|
2022-04-08 17:36:51 +00:00
|
|
|
CONFIG_DEBUG_UART=y
|
2022-05-25 16:16:03 +00:00
|
|
|
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
|
|
|
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
|
2017-08-25 21:50:27 +00:00
|
|
|
# CONFIG_ANDROID_BOOT_IMAGE is not set
|
2019-12-05 10:11:55 +00:00
|
|
|
CONFIG_FIT=y
|
|
|
|
CONFIG_FIT_VERBOSE=y
|
|
|
|
CONFIG_SPL_LOAD_FIT=y
|
2020-07-19 19:56:12 +00:00
|
|
|
# CONFIG_USE_SPL_FIT_GENERATOR is not set
|
2019-07-21 02:51:14 +00:00
|
|
|
CONFIG_USE_PREBOOT=y
|
2018-05-25 21:45:05 +00:00
|
|
|
CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb"
|
2020-10-09 16:22:06 +00:00
|
|
|
CONFIG_SILENT_CONSOLE=y
|
2018-03-28 12:38:17 +00:00
|
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
2022-05-16 21:20:26 +00:00
|
|
|
CONFIG_SPL_PAD_TO=0x7f8000
|
2022-05-19 19:09:22 +00:00
|
|
|
CONFIG_SPL_NO_BSS_LIMIT=y
|
2022-05-26 17:13:21 +00:00
|
|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
|
|
CONFIG_SPL_STACK=0xff718000
|
2019-09-18 09:56:42 +00:00
|
|
|
CONFIG_SPL_STACK_R=y
|
rockchip: rk3288-evb: update SPL_STACK/MALLOC_LEN config with rk3399
Update the SPL_STACK_R_MALLOC_SIMPLE_LEN which also including space for
STACK and the size may not enough when loding FIT image in SPL.
If the size is not enough, you can see log like this when loding FIT:
U-Boot TPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53)
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53 +0800)
Trying to boot from MMC2
And if enable the DEBUG for everyting in SPL, the log will hang at dwmmc
sending CMD16 for 'uboot' loadables binary because this step need a
large stack cost(about 0x2d00).
External data: dst=8400000, offset=72638, size=b3580
Image OS is Trusted Execution Environment
board_fit_config_name_match: rk3288-evb
Selecting config 'rk3288-evb'loadables: 'uboot'
blk_find_device: if_type=6, devnum=1: dwmmc@ff0c0000.blk, 6, 0
blk_find_device: if_type=6, devnum=1: dwmmc@ff0f0000.blk, 6, 1
Sending CMD16
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 10:11:53 +00:00
|
|
|
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
|
2021-09-02 09:56:16 +00:00
|
|
|
CONFIG_SPL_OPTEE_IMAGE=y
|
2022-06-25 23:29:46 +00:00
|
|
|
CONFIG_SYS_BOOTM_LEN=0x4000000
|
2017-08-14 23:58:53 +00:00
|
|
|
CONFIG_CMD_GPIO=y
|
2017-01-27 10:00:42 +00:00
|
|
|
CONFIG_CMD_GPT=y
|
2017-08-14 23:58:53 +00:00
|
|
|
CONFIG_CMD_I2C=y
|
2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_CMD_MMC=y
|
|
|
|
CONFIG_CMD_SPI=y
|
2017-12-15 00:17:13 +00:00
|
|
|
CONFIG_CMD_USB=y
|
2019-05-13 13:51:04 +00:00
|
|
|
CONFIG_CMD_USB_MASS_STORAGE=y
|
2016-07-05 10:06:30 +00:00
|
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
|
|
CONFIG_CMD_CACHE=y
|
|
|
|
CONFIG_CMD_TIME=y
|
|
|
|
CONFIG_CMD_PMIC=y
|
|
|
|
CONFIG_CMD_REGULATOR=y
|
2017-01-27 10:00:37 +00:00
|
|
|
# CONFIG_SPL_DOS_PARTITION is not set
|
2017-01-27 10:00:41 +00:00
|
|
|
# CONFIG_SPL_EFI_PARTITION is not set
|
2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
|
|
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
2017-08-28 11:16:32 +00:00
|
|
|
CONFIG_ENV_IS_IN_MMC=y
|
2019-11-13 03:46:36 +00:00
|
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
2018-01-13 05:53:55 +00:00
|
|
|
CONFIG_NET_RANDOM_ETHADDR=y
|
2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_REGMAP=y
|
|
|
|
CONFIG_SPL_REGMAP=y
|
|
|
|
CONFIG_SYSCON=y
|
|
|
|
CONFIG_SPL_SYSCON=y
|
|
|
|
CONFIG_CLK=y
|
|
|
|
CONFIG_SPL_CLK=y
|
2018-05-29 15:30:55 +00:00
|
|
|
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
|
|
CONFIG_LED=y
|
|
|
|
CONFIG_LED_GPIO=y
|
2017-01-10 04:32:04 +00:00
|
|
|
CONFIG_MMC_DW=y
|
2017-01-10 04:32:03 +00:00
|
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
2019-10-03 17:50:05 +00:00
|
|
|
CONFIG_MTD=y
|
2019-02-27 14:20:36 +00:00
|
|
|
CONFIG_SF_DEFAULT_SPEED=20000000
|
2017-02-23 06:20:17 +00:00
|
|
|
CONFIG_DM_ETH=y
|
|
|
|
CONFIG_ETH_DESIGNWARE=y
|
|
|
|
CONFIG_GMAC_ROCKCHIP=y
|
2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_PINCTRL=y
|
|
|
|
CONFIG_SPL_PINCTRL=y
|
|
|
|
CONFIG_DM_PMIC=y
|
|
|
|
CONFIG_PMIC_ACT8846=y
|
|
|
|
CONFIG_REGULATOR_ACT8846=y
|
|
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
|
|
CONFIG_RAM=y
|
|
|
|
CONFIG_SPL_RAM=y
|
|
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
2016-09-08 20:11:59 +00:00
|
|
|
CONFIG_SYSRESET=y
|
2017-08-25 21:50:26 +00:00
|
|
|
CONFIG_USB=y
|
2018-02-11 01:27:45 +00:00
|
|
|
CONFIG_USB_DWC2=y
|
2018-01-02 16:39:52 +00:00
|
|
|
CONFIG_ROCKCHIP_USB2_PHY=y
|
2017-08-25 21:50:26 +00:00
|
|
|
CONFIG_USB_GADGET=y
|
|
|
|
CONFIG_USB_GADGET_DWC2_OTG=y
|
2017-06-21 03:22:03 +00:00
|
|
|
CONFIG_DM_VIDEO=y
|
2020-02-04 21:43:06 +00:00
|
|
|
# CONFIG_VIDEO_BPP8 is not set
|
2017-06-21 03:22:03 +00:00
|
|
|
CONFIG_DISPLAY=y
|
|
|
|
CONFIG_VIDEO_ROCKCHIP=y
|
|
|
|
CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
|
|
|
|
CONFIG_DISPLAY_ROCKCHIP_MIPI=y
|
2016-07-05 10:06:30 +00:00
|
|
|
CONFIG_CMD_DHRYSTONE=y
|
|
|
|
CONFIG_ERRNO_STR=y
|