spl: Convert CONFIG_SPL_SIZE_LIMIT to hex

This is currently a decimal value which is not as convenient or
meaningful. Also U-Boot tends to use hex everywhere.

Convert this option to hex and add a comment for the size_check macro.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the typo in the commit title]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass 2019-09-25 08:56:28 -06:00 committed by Bin Meng
parent 27084c03d3
commit b51882d007
5 changed files with 11 additions and 7 deletions

View file

@ -337,14 +337,18 @@ endif
# KBUILD_MODULES := 1
#endif
# Check ths size of a binary:
# Args:
# $1: File to check
# #2: Size limit in bytes (decimal or 0xhex)
define size_check
actual=$$( wc -c $1 | awk '{print $$1}'); \
limit=$$( printf "%d" $2 ); \
if test $$actual -gt $$limit; then \
echo "$1 exceeds file size limit:" >&2; \
echo " limit: $$limit bytes" >&2; \
echo " actual: $$actual bytes" >&2; \
echo " excess: $$((actual - limit)) bytes" >&2; \
echo " limit: $$(printf %#x bytes $$limit) bytes" >&2; \
echo " actual: $$(printf %#x $$actual) bytes" >&2; \
echo " excess: $$(printf %#x $$((actual - limit))) bytes" >&2;\
exit 1; \
fi
endef

View file

@ -4,7 +4,7 @@ config NR_DRAM_BANKS
default 1
config SPL_SIZE_LIMIT
default 65536 if TARGET_SOCFPGA_GEN5
default 0x10000 if TARGET_SOCFPGA_GEN5
config SPL_SIZE_LIMIT_PROVIDE_STACK
default 0x200 if TARGET_SOCFPGA_GEN5

View file

@ -26,7 +26,7 @@ config SPL_FRAMEWORK
and the Linux Kernel. If unsure, say Y.
config SPL_SIZE_LIMIT
int "Maximum size of SPL image"
hex "Maximum size of SPL image"
depends on SPL
default 69632 if ARCH_MX6
default 0

View file

@ -4,7 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_EVB_RK3288=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_SIZE_LIMIT=307200
CONFIG_SPL_SIZE_LIMIT=0x4b000
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000

View file

@ -5,7 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_SIZE_LIMIT=307200
CONFIG_SPL_SIZE_LIMIT=0x4b000
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000