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u-boot/arch/arm/dts/zynqmp-zcu111-revA.dts

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arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP ZCU111
*
arm64: zynqmp: Update Copyright years to 2021 Trivial change for all files I have touched recently. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-31 07:50:01 +00:00
* (C) Copyright 2017 - 2021, Xilinx, Inc.
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
*
arm64: zynqmp: Switch to amd.com emails Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
2023-07-10 12:35:49 +00:00
* Michal Simek <michal.simek@amd.com>
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
#include <dt-bindings/phy/phy.h>
/ {
model = "ZynqMP ZCU111 RevA";
compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
aliases {
ethernet0 = &gem3;
i2c0 = &i2c0;
i2c1 = &i2c1;
mmc0 = &sdhci1;
xilinx: Convert xlnx,eeprom property to nvmem alias Convert all boards to use nvmem alias instead of xlnx,eeprom. The change is done based on discussion in the link below. Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-03 09:46:50 +00:00
nvmem0 = &eeprom;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
rtc0 = &rtc;
serial0 = &uart0;
serial1 = &dcc;
spi0 = &qspi;
usb0 = &usb0;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
/* Another 4GB connected to PL */
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
arm64: zynqmp: Align gpio-key node names with dtschema The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). It is based on kernel commit (228e8a88b1915a2b467c83d8d0976605f1272fae). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ae23999097553acb21dfca9288a913bb8b24587a.1670590595.git.michal.simek@amd.com
2022-12-09 12:56:40 +00:00
switch-19 {
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
label = "sw19";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_DOWN>;
arm64: dts: zynqmp: replace gpio-key,wakeup with wakeup-source property Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. This patch replaces the legacy properties with the unified "wakeup-source" property introduced by: "Input: gpio_keys - switch to using generic device properties" (sha1: 700a38b27eefc582099fdf69effacfad0ad738a4) Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-24 11:45:40 +00:00
wakeup-source;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
autorepeat;
};
};
leds {
compatible = "gpio-leds";
arm64: dts: zynqmp: Fix node names which contain "_" s/_/-/ for node names. It fixes warnings like this: ... Warning (node_name_chars_strict): /cpu_opp_table: Character '_' not recommended in node name ... Issues reported by make dtbs W=12 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-08 09:06:53 +00:00
heartbeat-led {
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
label = "heartbeat";
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
ina226-u67 {
compatible = "iio-hwmon";
io-channels = <&u67 0>, <&u67 1>, <&u67 2>, <&u67 3>;
};
ina226-u59 {
compatible = "iio-hwmon";
io-channels = <&u59 0>, <&u59 1>, <&u59 2>, <&u59 3>;
};
ina226-u61 {
compatible = "iio-hwmon";
io-channels = <&u61 0>, <&u61 1>, <&u61 2>, <&u61 3>;
};
ina226-u60 {
compatible = "iio-hwmon";
io-channels = <&u60 0>, <&u60 1>, <&u60 2>, <&u60 3>;
};
ina226-u64 {
compatible = "iio-hwmon";
io-channels = <&u64 0>, <&u64 1>, <&u64 2>, <&u64 3>;
};
ina226-u69 {
compatible = "iio-hwmon";
io-channels = <&u69 0>, <&u69 1>, <&u69 2>, <&u69 3>;
};
ina226-u66 {
compatible = "iio-hwmon";
io-channels = <&u66 0>, <&u66 1>, <&u66 2>, <&u66 3>;
};
ina226-u65 {
compatible = "iio-hwmon";
io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
};
ina226-u63 {
compatible = "iio-hwmon";
io-channels = <&u63 0>, <&u63 1>, <&u63 2>, <&u63 3>;
};
ina226-u3 {
compatible = "iio-hwmon";
io-channels = <&u3 0>, <&u3 1>, <&u3 2>, <&u3 3>;
};
ina226-u71 {
compatible = "iio-hwmon";
io-channels = <&u71 0>, <&u71 1>, <&u71 2>, <&u71 3>;
};
ina226-u77 {
compatible = "iio-hwmon";
io-channels = <&u77 0>, <&u77 1>, <&u77 2>, <&u77 3>;
};
ina226-u73 {
compatible = "iio-hwmon";
io-channels = <&u73 0>, <&u73 1>, <&u73 2>, <&u73 3>;
};
ina226-u79 {
compatible = "iio-hwmon";
io-channels = <&u79 0>, <&u79 1>, <&u79 2>, <&u79 3>;
};
xilinx: Sync DTs with Linux kernel There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-26 13:25:02 +00:00
/* 48MHz reference crystal */
ref48: ref48M {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
&dcc {
status = "okay";
};
&fpd_dma_chan1 {
status = "okay";
};
&fpd_dma_chan2 {
status = "okay";
};
&fpd_dma_chan3 {
status = "okay";
};
&fpd_dma_chan4 {
status = "okay";
};
&fpd_dma_chan5 {
status = "okay";
};
&fpd_dma_chan6 {
status = "okay";
};
&fpd_dma_chan7 {
status = "okay";
};
&fpd_dma_chan8 {
status = "okay";
};
&gem3 {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gem3_default>;
arm64: zynqmp: Describe TI phy as ethernet-phy-id TI DP83867 is using strapping based on MIO pins. Tristate setup can influce PHY address. That's why switch description with ethernet-phy-id compatible string which enable calling reset. PHY itself setups phy address after power up or reset. Reset description will be added in separate commit. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/52bf9ac0453d4e4896d8edd2618e684bb1ff6012.1662721547.git.michal.simek@amd.com
2022-09-09 11:05:48 +00:00
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@c {
#phy-cells = <1>;
compatible = "ethernet-phy-id2000.a231";
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
arm64: zynqmp: Wire GEM reset gpio With ethernet-phy-id driver ETH phy reset can be properly handle that's why describe it in DT. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5bfd92827033d19617113f4117f37dcf79699a0f.1662721547.git.michal.simek@amd.com
2022-09-09 11:05:49 +00:00
reset-gpios = <&tca6416_u22 6 GPIO_ACTIVE_LOW>;
arm64: zynqmp: Describe TI phy as ethernet-phy-id TI DP83867 is using strapping based on MIO pins. Tristate setup can influce PHY address. That's why switch description with ethernet-phy-id compatible string which enable calling reset. PHY itself setups phy address after power up or reset. Reset description will be added in separate commit. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/52bf9ac0453d4e4896d8edd2618e684bb1ff6012.1662721547.git.michal.simek@amd.com
2022-09-09 11:05:48 +00:00
};
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
};
&gpio {
status = "okay";
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_default>;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
&gpu {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c0_default>;
pinctrl-1 = <&pinctrl_i2c0_gpio>;
xilinx: dts: Fix open drain warning on Zynq, ZynqMP and Versal Fix for below open drain warning on Zynq, ZynqMP and Versal reported by Linux. "enforced open drain please flag it properly in DT/ACPI DSDT/board file." Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/056b6f60f89fa2addb762669b80640cd5b31b001.1688992653.git.michal.simek@amd.com
2023-07-10 12:37:28 +00:00
scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
tca6416_u22: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
gpio-controller; /* interrupt not connected */
#gpio-cells = <2>;
/*
* IRQ not connected
* Lines:
* 0 - MAX6643_OT_B
* 1 - MAX6643_FANFAIL_B
* 2 - MIO26_PMU_INPUT_LS
* 4 - SFP_SI5382_INT_ALM
* 5 - IIC_MUX_RESET_B
* 6 - GEM3_EXP_RESET_B
* 10 - FMCP_HSPC_PRSNT_M2C_B
* 11 - CLK_SPI_MUX_SEL0
* 12 - CLK_SPI_MUX_SEL1
* 16 - IRPS5401_ALERT_B
* 17 - INA226_PMBUS_ALERT
* 3, 7, 13-15 - not connected
*/
};
i2c-mux@75 { /* u23 */
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* PS_PMBUS */
/* PMBUS_ALERT done via pca9544 */
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u67: ina226@40 { /* u67 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u67";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x40>;
shunt-resistor = <2000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u59: ina226@41 { /* u59 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u59";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x41>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u61: ina226@42 { /* u61 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u61";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x42>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u60: ina226@43 { /* u60 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u60";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x43>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u64: ina226@45 { /* u64 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u64";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x45>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u69: ina226@46 { /* u69 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u69";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x46>;
shunt-resistor = <2000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u66: ina226@47 { /* u66 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u66";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x47>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u65: ina226@48 { /* u65 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u65";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x48>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u63: ina226@49 { /* u63 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u63";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x49>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u3: ina226@4a { /* u3 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u3";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x4a>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u71: ina226@4b { /* u71 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u71";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x4b>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u77: ina226@4c { /* u77 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u77";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x4c>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u73: ina226@4d { /* u73 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u73";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x4d>;
shunt-resistor = <5000>;
};
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
u79: ina226@4e { /* u79 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "ti,ina226";
arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111 ina226 hwmon driver is deprecated and it is recommended to use new iio based driver. The patch is enabling iio-hwmon driver to export functionality from IIO to hwmon interface to be able to use lm-sensors package. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 07:45:03 +00:00
#io-channel-cells = <1>;
arm64: zynqmp: Add label property to all ina226 on zcu111 Label property is adding capability to distiguish chips from each other when iio framework is used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-08-26 08:00:26 +00:00
label = "ina226-u79";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x4e>;
shunt-resistor = <5000>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* NC */
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
arm64: zynqmp: Fix irps5401 device nodes - Do not use irps54012 as device node which is not correct. - Fix addresses of irps5401/u180 on zcu104 revisions. - Remove clock-cells property. It is PMIC without any clock output. - Define irps5401 nodes in zynqmp-e-a2197 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-03-30 09:35:38 +00:00
irps5401_43: irps5401@43 { /* IRPS5401 - u53 check these */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "infineon,irps5401";
reg = <0x43>;
};
arm64: zynqmp: Fix irps5401 device nodes - Do not use irps54012 as device node which is not correct. - Fix addresses of irps5401/u180 on zcu104 revisions. - Remove clock-cells property. It is PMIC without any clock output. - Define irps5401 nodes in zynqmp-e-a2197 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-03-30 09:35:38 +00:00
irps5401_44: irps5401@44 { /* IRPS5401 - u55 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "infineon,irps5401";
reg = <0x44>;
};
arm64: zynqmp: Fix irps5401 device nodes - Do not use irps54012 as device node which is not correct. - Fix addresses of irps5401/u180 on zcu104 revisions. - Remove clock-cells property. It is PMIC without any clock output. - Define irps5401 nodes in zynqmp-e-a2197 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-03-30 09:35:38 +00:00
irps5401_45: irps5401@45 { /* IRPS5401 - u57 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
compatible = "infineon,irps5401";
reg = <0x45>;
};
/* u68 IR38064 +0 */
/* u70 IR38060 +1 */
/* u74 IR38060 +2 */
/* u75 IR38060 +6 */
/* J19 header too */
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* SYSMON */
};
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1_default>;
pinctrl-1 = <&pinctrl_i2c1_gpio>;
xilinx: dts: Fix open drain warning on Zynq, ZynqMP and Versal Fix for below open drain warning on Zynq, ZynqMP and Versal reported by Linux. "enforced open drain please flag it properly in DT/ACPI DSDT/board file." Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/056b6f60f89fa2addb762669b80640cd5b31b001.1688992653.git.michal.simek@amd.com
2023-07-10 12:37:28 +00:00
scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
i2c-mux@74 { /* u26 */
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/*
* IIC_EEPROM 1kB memory which uses 256B blocks
* where every block has different address.
* 0 - 256B address 0x54
* 256B - 512B address 0x55
* 512B - 768B address 0x56
* 768B - 1024B address 0x57
*/
eeprom: eeprom@54 { /* u88 */
compatible = "atmel,24c08";
reg = <0x54>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
si5341: clock-generator@36 { /* SI5341 - u46 */
xilinx: Sync DTs with Linux kernel There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-26 13:25:02 +00:00
compatible = "silabs,si5341";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
reg = <0x36>;
xilinx: Sync DTs with Linux kernel There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-26 13:25:02 +00:00
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&ref48>;
clock-names = "xtal";
clock-output-names = "si5341";
si5341_0: out@0 {
/* refclk0 for PS-GT, used for DP */
reg = <0>;
always-on;
};
si5341_2: out@2 {
/* refclk2 for PS-GT, used for USB3 */
reg = <2>;
always-on;
};
si5341_3: out@3 {
/* refclk3 for PS-GT, used for SATA */
reg = <3>;
always-on;
};
si5341_5: out@5 {
/* refclk5 PL CLK100 */
reg = <5>;
always-on;
};
si5341_6: out@6 {
/* refclk6 PL CLK125 */
reg = <6>;
always-on;
};
si5341_9: out@9 {
/* refclk9 used for PS_REF_CLK 33.3 MHz */
reg = <9>;
always-on;
};
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
si570_1: clock-generator@5d { /* USER SI570 - u47 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5d>;
temperature-stability = <50>;
factory-fout = <300000000>;
clock-frequency = <300000000>;
arm64: zynqmp: Setup clock-output-names for si570 chips If there are more instances of si570 clock-output-names property should be used for differentiation of clock output. The patch is adding this optional properties for all zynqmp boards with si570 chip. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-18 10:10:02 +00:00
clock-output-names = "si570_user";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
si570_2: clock-generator@5d { /* USER MGT SI570 - u49 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5d>;
temperature-stability = <50>;
factory-fout = <156250000>;
arm64: zynqmp: Fix the si570 clock frequency on zcu111 The si570 clock frequency should be 156.25MHz as per datasheet. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-09-05 03:00:38 +00:00
clock-frequency = <156250000>;
arm64: zynqmp: Setup clock-output-names for si570 chips If there are more instances of si570 clock-output-names property should be used for differentiation of clock output. The patch is adding this optional properties for all zynqmp boards with si570 chip. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-18 10:10:02 +00:00
clock-output-names = "si570_mgt";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
arm64: zynqmp: Remove si5328 and si5382 nodes There are no drivers for these devices that's why remove that nodes completely. This change is done based on Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com
2021-06-03 09:58:08 +00:00
/* SI5382 - u48 */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
sc18is603@2f { /* sc18is602 - u93 */
compatible = "nxp,sc18is603";
reg = <0x2f>;
/* 4 gpios for CS not handled by driver */
/*
* USB2ANY cable or
* LMK04208 - u90 or
* LMX2594 - u102 or
* LMX2594 - u103 or
* LMX2594 - u104
*/
};
};
i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
/* FMC connector */
};
/* 7 NC */
};
i2c-mux@75 {
compatible = "nxp,pca9548"; /* u27 */
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* FMCP_HSPC_IIC */
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* NC */
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
/* SYSMON */
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
/* DDR4 SODIMM */
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
/* SFP3 */
};
i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
/* SFP2 */
};
i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
/* SFP1 */
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
/* SFP0 */
};
};
};
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
&pinctrl0 {
status = "okay";
pinctrl_i2c0_default: i2c0-default {
mux {
groups = "i2c0_3_grp";
function = "i2c0";
};
conf {
groups = "i2c0_3_grp";
bias-pull-up;
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_i2c0_gpio: i2c0-gpio {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
};
conf {
groups = "gpio0_14_grp", "gpio0_15_grp";
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_i2c1_default: i2c1-default {
mux {
groups = "i2c1_4_grp";
function = "i2c1";
};
conf {
groups = "i2c1_4_grp";
bias-pull-up;
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_i2c1_gpio: i2c1-gpio {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
};
conf {
groups = "gpio0_16_grp", "gpio0_17_grp";
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_uart0_default: uart0-default {
mux {
groups = "uart0_4_grp";
function = "uart0";
};
conf {
groups = "uart0_4_grp";
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
conf-rx {
pins = "MIO18";
bias-high-impedance;
};
conf-tx {
pins = "MIO19";
bias-disable;
};
};
pinctrl_usb0_default: usb0-default {
mux {
groups = "usb0_0_grp";
function = "usb0";
};
conf {
groups = "usb0_0_grp";
power-source = <IO_STANDARD_LVCMOS18>;
};
conf-rx {
pins = "MIO52", "MIO53", "MIO55";
bias-high-impedance;
arm64: zynqmp: Fix usb node drive strength and slew rate As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb gorup pins. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com
2022-06-15 10:16:13 +00:00
drive-strength = <12>;
slew-rate = <SLEW_RATE_FAST>;
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
};
conf-tx {
pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
"MIO60", "MIO61", "MIO62", "MIO63";
bias-disable;
arm64: zynqmp: Fix usb node drive strength and slew rate As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb gorup pins. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com
2022-06-15 10:16:13 +00:00
drive-strength = <4>;
slew-rate = <SLEW_RATE_SLOW>;
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
};
};
pinctrl_gem3_default: gem3-default {
mux {
function = "ethernet3";
groups = "ethernet3_0_grp";
};
conf {
groups = "ethernet3_0_grp";
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
conf-rx {
pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74",
"MIO75";
bias-high-impedance;
low-power-disable;
};
conf-tx {
pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68",
"MIO69";
bias-disable;
low-power-enable;
};
mux-mdio {
function = "mdio3";
groups = "mdio3_0_grp";
};
conf-mdio {
groups = "mdio3_0_grp";
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
bias-disable;
};
};
pinctrl_sdhci1_default: sdhci1-default {
mux {
groups = "sdio1_0_grp";
function = "sdio1";
};
conf {
groups = "sdio1_0_grp";
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
bias-disable;
};
mux-cd {
groups = "sdio1_cd_0_grp";
function = "sdio1_cd";
};
conf-cd {
groups = "sdio1_cd_0_grp";
bias-high-impedance;
bias-pull-up;
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
};
pinctrl_gpio_default: gpio-default {
mux {
function = "gpio0";
groups = "gpio0_22_grp", "gpio0_23_grp";
};
conf {
groups = "gpio0_22_grp", "gpio0_23_grp";
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
mux-msp {
function = "gpio0";
groups = "gpio0_13_grp", "gpio0_38_grp";
};
conf-msp {
groups = "gpio0_13_grp", "gpio0_38_grp";
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
};
conf-pull-up {
pins = "MIO22";
bias-pull-up;
};
conf-pull-none {
pins = "MIO13", "MIO23", "MIO38";
bias-disable;
};
};
};
arm64: zynqmp: Sync psgtr location on zcu104/zcu111/zc1751-dc1 psgtr node should be below pinctrl for easier comparion among dts files. That's why move that nodes to different location. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-03 13:18:04 +00:00
&psgtr {
status = "okay";
/* nc, dp, usb3, sata */
clocks = <&si5341 0 0>, <&si5341 0 2>, <&si5341 0 3>;
clock-names = "ref1", "ref2", "ref3";
};
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
&qspi {
status = "okay";
is-dual = <1>;
flash@0 {
dts: switch spi-flash to jedec, spi-nor compatible There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot dts files. This compatible has been added in sf_probe, let use it. This patch switches to jedec,spi-nor when spi-flash is used in the DTS and DTSI files, and removed spi-flash when jedec,spi-nor is already present. The x86 dts are switched in a separate commit since it depends on a change in fdtdec. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-02-10 10:16:20 +00:00
compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
arm64: zynqmp: Set qspi tx-buswidth to 4 In all the ZynqMP boards dts files tx-buswidth is by default set to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4 in ZynqMP boards dts files. This would enable the spi-nor framework to issue 1-4-4 write commands instead of 1-1-1. This will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ad61199f55e5e00f29de6206d9d1872a52a7657e.1652193179.git.michal.simek@amd.com
2022-05-10 14:33:01 +00:00
spi-tx-bus-width = <4>;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
arm64: zynqmp: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-14 13:19:56 +00:00
partition@0 { /* for testing purpose */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
arm64: zynqmp: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-14 13:19:56 +00:00
partition@100000 { /* for testing purpose */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
arm64: zynqmp: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-14 13:19:56 +00:00
partition@600000 { /* for testing purpose */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
arm64: zynqmp: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-14 13:19:56 +00:00
partition@620000 { /* for testing purpose */
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&rtc {
status = "okay";
};
&sata {
status = "okay";
/* SATA OOB timing settings */
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
phy-names = "sata-phy";
arm64: zynqmp: Add psgtr DT descriptions Mainline kernel has psgtr driver that's why it is good to add description to DT files. Some boards are just missing description for USB3 and sata. zc1751-dc1 and p-a2197 are also missing clock descriptions for input clocks. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 12:55:34 +00:00
phys = <&psgtr 3 PHY_TYPE_SATA 1 3>;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci1_default>;
arm64: zynqmp: Disable WP on zcu111 On this board there is SD slot without WP connected. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-04 12:08:24 +00:00
disable-wp;
arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards. User can remove this property to enable the UHS mode. This is to keep the same speed (HS) modes across all the stages of the Linux Boot. Due to power cycling limitation of some of the ZynqMP boards, some SD cards don't get power cycled and are failing in Linux. Signed-off-by: Manish Narani <manish.narani@xilinx.com>
2020-02-14 06:37:30 +00:00
/*
* This property should be removed for supporting UHS mode
*/
no-1-8-v;
xilinx: Fix xlnx,mio_bank property s/xlnx,mio_bank/xlnx,mio-bank/g DT binding is describing mio-bank not mio_bank that's why fix all DTSes and also driver itself. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2020-07-22 15:42:43 +00:00
xlnx,mio-bank = <1>;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
&uart0 {
status = "okay";
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
arm64: zynqmp: Add pinctrl description ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 11:14:02 +00:00
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0_default>;
arm64: zynqmp: Move USB3 PHY properties from DWC3 node to USB node Move the PHY properties from DWC3 node to USB node in ZynqMP DTs as here the USB3 PHY used is PSGTR, which is connected to Xilinx USB core. This PHY initialization should be handled from Xilinx USB core as the prerequisite register configurations are done here only. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-14 12:17:19 +00:00
phy-names = "usb3-phy";
phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
arm64: zynqmp: Add psgtr DT descriptions Mainline kernel has psgtr driver that's why it is good to add description to DT files. Some boards are just missing description for USB3 and sata. zc1751-dc1 and p-a2197 are also missing clock descriptions for input clocks. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 12:55:34 +00:00
};
&dwc3_0 {
status = "okay";
xilinx: Sync DTs with Linux kernel There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-26 13:25:02 +00:00
dr_mode = "host";
arm64: zynqmp: Add psgtr DT descriptions Mainline kernel has psgtr driver that's why it is good to add description to DT files. Some boards are just missing description for USB3 and sata. zc1751-dc1 and p-a2197 are also missing clock descriptions for input clocks. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-10 12:55:34 +00:00
snps,usb3_lpm_capable;
arm64: zynqmp: Add maximum-speed property for dwc3 nodes dwc3 can be used only for higher speeds than super-speed that's why explicitly set it up. This is also aligned with other ZynqMP dts files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-31 15:51:58 +00:00
maximum-speed = "super-speed";
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
xilinx: Sync DTs with Linux kernel There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-26 13:25:02 +00:00
&zynqmp_dpdma {
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
status = "okay";
xilinx: Sync DTs with Linux kernel There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-26 13:25:02 +00:00
};
&zynqmp_dpsub {
status = "okay";
phy-names = "dp-phy0", "dp-phy1";
phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
<&psgtr 0 PHY_TYPE_DP 1 1>;
arm64: zynqmp: Add support for Xilinx zcu111-revA Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-28 13:55:27 +00:00
};
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