Scott Mansell
43e3e0f3c2
m1n1.hw.uat: Reflect ARMv8 nature
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Signed-off-by: Scott Mansell <phiren@gmail.com>
2022-05-21 03:52:32 +09:00
Scott Mansell
f72417b78f
m1n1.trace.agx: Add support for Work submission
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Signed-off-by: Scott Mansell <phiren@gmail.com>
2022-05-21 03:52:32 +09:00
Scott Mansell
636ebe70d7
m1n1.hw.uat: Allow accessing as a stream
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This allows us to use construct's Pointer
Signed-off-by: Scott Mansell <phiren@gmail.com>
2022-05-21 03:52:32 +09:00
Scott Mansell
804e944a1b
m1n1.constructutils: Add ConstructClass wrapper around construct
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Signed-off-by: Scott Mansell <phiren@gmail.com>
2022-05-21 03:52:32 +09:00
Scott Mansell
42edf41e37
m1n1.hw.uat: fix VA_MASK
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Was missing the lowest bits, which broke unaligned reads/writes
Signed-off-by: Scott Mansell <phiren@gmail.com>
2022-05-21 03:52:32 +09:00
Scott Mansell
980b9241d2
m1n1.trace.agx: Trace AGX wip
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Signed-off-by: Scott Mansell <phiren@gmail.com>
2022-05-21 03:46:36 +09:00
Scott Mansell
90eae66b33
m1n1.hw.uat: Intitial UAT implementaiton
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Signed-off-by: Scott Mansell <phiren@gmail.com>
2022-05-21 03:46:26 +09:00
Scott Mansell
254f01b3ea
m1n1.proxyutils.RegMon: Allow custom read lambda
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Useful for monitoring ranges beind an iommu
Signed-off-by: Scott Mansell <phiren@gmail.com>
2022-05-21 03:46:14 +09:00
Hector Martin
52bb64b86c
hv_exc: Do not forget to arm tick in fast path
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Signed-off-by: Hector Martin <marcan@marcan.st>
2022-04-20 00:38:22 +09:00
Hector Martin
e750dfcca1
hv_exc: Improve multi-core scalability
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The HV tick polling now only runs on CPU#0. All CPUs have the 1000Hz
HV tick, but secondaries only use it to poll the FIQ state and that path
does not take the BHL if no other FIQ was pending.
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-04-20 00:20:58 +09:00
Hector Martin
3020e26e00
dart: Announce real-time DARTs
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Mostly just for reference.
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-04-19 23:42:22 +09:00
Hector Martin
fabe27e3f1
memory: Remap some carveouts as uncached
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This fixes display DART real-time cache hits causing AMCC exceptions.
The relevant carve-outs have flags 0x60004016; 0x60004002 is used for
DCP which is non-realtime, so I'm guessing the '16' means we should map
it uncached.
Signed-off-by: Hector Martin <marcan@marcan.st>
2022-04-19 23:41:17 +09:00
Hector Martin
144c3da78e
experiments/amcc_err_handler.py: New old thing to dump AMCC errors
2022-04-19 23:32:11 +09:00
Janne Grunau
d4637513e0
WIP: m1n1.hv: add support for starting CPUs on the second M1 Ultra die
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notes:
- macos guest only works if the display is not initialized
- macos guest appears to be very slow
Signed-off-by: Janne Grunau <j@jannau.net>
2022-04-19 21:39:52 +09:00
Janne Grunau
6df73d80ee
cpufreq: Add support for t6002
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Signed-off-by: Janne Grunau <j@jannau.net>
2022-04-19 21:39:52 +09:00
Janne Grunau
4aa4ff98b6
smp: Start CPU cores on the second t6002 die
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Signed-off-by: Janne Grunau <j@jannau.net>
2022-04-19 21:39:52 +09:00
Hector Martin
8df40df17e
nvme: Support nvme on die 1 for t6002
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Signed-off-by: Hector Martin <marcan@marcan.st>
2022-04-19 21:39:52 +09:00
Janne Grunau
6256baca04
pmgr: Add multi-die support for t6002
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Signed-off-by: Janne Grunau <j@jannau.net>
2022-04-19 21:39:52 +09:00
Janne Grunau
76fd226f7c
aic: Add support for multi-die AIC2 as seen on the M1 Ultra
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Multi-die IRQs are coded as in the ADT: die * max_irq + num
Signed-off-by: Janne Grunau <j@jannau.net>
2022-04-19 21:29:30 +09:00
Janne Grunau
524cb4a34f
soc: Add target for t6002
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Signed-off-by: Janne Grunau <j@jannau.net>
2022-04-19 21:29:30 +09:00
Janne Grunau
1b5dee2496
display: Map the framebuffer if it is not mapped
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iboot on Mac Studio (M1 Ultra) does not map the framebuffer("/vram")
for dcp and disp0.
Signed-off-by: Janne Grunau <j@jannau.net>
2022-04-19 21:29:30 +09:00
Janne Grunau
0104abbea7
dart: Add dart_find_iova() to find unused IOVA space
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Signed-off-by: Janne Grunau <j@jannau.net>
2022-04-19 21:29:30 +09:00
R
90479ac755
jpeg: Add documentation
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
04fc26639b
jpeg: Unbreak encode for RGB formats
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
d28ab8cc81
jpeg: Figured out how to activate tiling
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
b2a0352a8f
jpeg: Implement encoding from planar formats
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
f2b8054309
jpeg: Support encoding linear YUV
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
c71d341ff1
jpeg: Implement YUV10 mode for encoding
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
4681053ea9
jpeg: Implement encoding other RGB formats
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
970b2789d0
jpeg: Implement encoding subsampling modes
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
45876d09a1
jpeg: Import working encode experiment
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
9fca773c8f
jpeg: Implement decoding into planar formats
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
3a18075d89
jpeg: Decode linear YUV
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
4c8807fcca
jpeg: Add RGB565 to decoder
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Note that dithering does not get configured
Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
7350baf58b
jpeg: Implement decoding other subsampling modes
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
0c1f89d1f9
jpeg: Import working basic decode experiment
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
49cdf7fe22
jpeg: probe registers more thoroughly
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
c6169c1c15
jpeg: Import register definitions
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This comes from experiments that were performed out-of-tree
Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:40:44 +09:00
R
0f6991ccbc
dart-t8110: fill in more details from poking
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
R
96b2d584fe
dart-t8110: Import more stuff pulled from symbols
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
R
ce5e5fe476
dart-t8110: Add other seen registers; poke protect
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
R
18535a2385
dart-t8110: uncomment helper functions
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
R
25ebf8adb1
dart-t8110: map/translate
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
R
5b07956e43
dart-t8110: flush/init
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
R
ecb9d1210c
dart-t8110: dumping appears to work completely
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
R
16028224f9
dart-t8110: dump first-level translation tables
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
R
4a09eca74a
dart-t8110: Initial commit
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Signed-off-by: R <rqou@berkeley.edu>
2022-04-16 19:24:00 +09:00
Kyle Evans
0ba2027e5e
proxyclient: tools: add a FreeBSD loader
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The differences are documented in the script itself, but the main odd
bit is that we pass the provided kernel as an initramfs. Our modified
loader will probe for the initramfs start/end props in FDT and put up
a memdisk that we load the kernel from. This choice was made for two
reasons:
1.) Avoid ad-hoc interpretations of a memory region in m1n1, it doesn't
care if we actually passed it an initramfs or not anyways.
2.) We already had some code on hand to do this in our loader, so I
suspect we've done similar shenanigans elsewhere anyways.
This also requires a U-Boot change to allow bootefi of an arbitrary
location, as long the size is provided.
The alignment constraints for loader/kernel were kept arbitrarily. The
kernel will be bounced anyways by loader. I don't recall what
alignment requirements UEFI payloads have, but 2M seems reasonable.
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
2022-04-16 19:22:55 +09:00
Sven Peter
e9f36ad8b2
kboot: disable phys nodes as well
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Signed-off-by: Sven Peter <sven@svenpeter.dev>
2022-04-16 19:22:28 +09:00
Sven Peter
28103d9003
kboot: propagate ATC tunables to the FDT
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Signed-off-by: Sven Peter <sven@svenpeter.dev>
2022-04-16 19:22:28 +09:00