Commit graph

1636 commits

Author SHA1 Message Date
Vincent Duvert
407663b73d bootstrap_port: Improve UART baud setting
Rework the serial port bootstrap so it works correctly if the target is already
at 1500000 baud.

No baud adjustment is made if the proxy is using the serial-USB interface.

Tested with the Mac-to-Mac serial connection (macvdmtool) and the serial-USB
connection.

Signed-off-by: Vincent Duvert <vincent@duvert.net>
2021-11-10 16:02:44 +09:00
Hector Martin
e763ce3f56 hv: Set SMP mode to WFE
This fixes early IRQs getting stuck in idle secondaries and breaking the
guest.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-08 19:57:02 +09:00
Hector Martin
8e0ca1a39c m1n1.hv: Print diagnostic info when MMIO forwarding fails
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-08 19:55:16 +09:00
Hector Martin
e19e74be8b m1n1.asm: Make work on macOS/clang
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-08 14:41:24 +09:00
Hector Martin
eb3af7daaf Makefile: do not use -Wp to pass Makefile dep generation args
This doesn't seem to work properly with clang...

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-08 13:53:04 +09:00
Hector Martin
84acf60c24 Fix warnings when building/linking with clang/llvm
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-08 13:53:04 +09:00
Hector Martin
1e6c856f5f Makefile: Make it build out-of-the-box on macOS
This requires a few dependencies installed with Homebrew.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-08 13:52:59 +09:00
Hector Martin
a4e922ecaf m1n1.hv: Map vUART IRQ properly
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 04:03:50 +09:00
Hector Martin
ff1b668a5d m1n1.hv: Fix broken cpu# in SYNC tracers
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 04:03:50 +09:00
Hector Martin
74dece703e m1n1.hv: Add support for dumping MMIO accesses in Python syntax to a log
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 04:03:50 +09:00
Hector Martin
bfc91be170 m1n1.hv: Keep track of started CPUs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 04:03:50 +09:00
Hector Martin
3d3d5ea5ad m1n1.hv: Forward more sysregs properly to EL12
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 04:03:50 +09:00
Hector Martin
4e4335a6ea chickens: Enable IRQs on t600x
This seems to be safe to do on M1 too.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 04:03:41 +09:00
Hector Martin
0c093521de pcie: Basic t600x support
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:55:48 +09:00
Hector Martin
f5af1caee5 hv_exc: Forward more sysregs
We don't normally trap these, but for experiments using TIDCP they are
useful to avoid.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:55:09 +09:00
Hector Martin
a383ef0b5a iodev: Protect iodevs with spinlocks
This makes SMP IRQ reports less flaky

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:53:39 +09:00
Hector Martin
85ca5b94cb m1n1.hv: Do map low RAM
Apparently this is still necessary

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:43 +09:00
Hector Martin
49858b6d2c m1n1.hv: Fix cpustart for >2 clusters
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:43 +09:00
Hector Martin
0005b6533b hv_exc: Add more sysreg passthroughs for t600x spam
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:43 +09:00
Hector Martin
f2975c7e34 m1n1.utils: Fix bug in RangeMap
Adding a zero-length range was breaking things.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:43 +09:00
Hector Martin
075168c233 m1n1.hv: Handle MMIO/PMGR hooks dynamically
This makes m1n1 boot all the way on t6000

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:43 +09:00
Hector Martin
08f90e6dd6 m1n1.hv: Fix bug for sync tracing 64-bit writes
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:43 +09:00
Hector Martin
77074b9098 hv_aic: Support AICv2
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:42 +09:00
Hector Martin
8fa422c0d3 fb: Map the framebuffer uncached, and use a shadow FB for speed
Turns out AMCC on t600x throws errors when DISP0 real-time memory
requests hit the CPU cache, and then macOS panics.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:30 +09:00
Hector Martin
dc3806252b aic: Basic AICv2 support
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-04 03:52:30 +09:00
Hector Martin
f824f60f5c utils: Unbork udelay()
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-02 12:36:07 +09:00
Hector Martin
6765bc3ff6 hv_vm: Support >36-bit PAs
This needs an extra L1 translation level, but only on SoCs with support
for >36-bit PAs. On M1, we bypass it and keep starting at L2.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-02 02:35:26 +09:00
Hector Martin
d7983c7173 arm_cpu_regs.h: Add SYS_ID_AA64MMFR0_EL1
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-02 02:23:07 +09:00
Hector Martin
339bd37077 m1n1.hv: Compute RAM base from bootargs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-02 02:22:47 +09:00
Hector Martin
e3f0836eae m1n1.hv: Use vUART base from ADT
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-02 02:22:17 +09:00
Hector Martin
e99138710a smp: Handle IRQ enable reg properly (maybe)
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 21:00:56 +09:00
Hector Martin
87613dc208 smp: Support more clusters/CPUs properly
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 21:00:56 +09:00
Hector Martin
9b6e5fbc52 cpufreq: Add preliminary T6000 support
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 21:00:56 +09:00
Hector Martin
d7bd21d51c usb: Use new DART code to autoselect compatible mode
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 21:00:56 +09:00
Hector Martin
1edb18ac44 pmgr: Do not try to fix up virtual devs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 21:00:56 +09:00
Hector Martin
84902062c9 dart: T6000 support
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 21:00:56 +09:00
Hector Martin
68aec75918 memory: Larger PA support & dynamically map MMIO
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 21:00:56 +09:00
Hector Martin
326ba6fb33 utils: Fix BIT() signedness
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 19:00:34 +09:00
Hector Martin
425daaedbd utils: Use CPU timer instead of AIC timer
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 19:00:34 +09:00
Hector Martin
bc82dbea4e m1n1.hw.dart: Add support for T6000 DARTs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 19:00:34 +09:00
Hector Martin
9fab740a77 tools/chainload.py: Add --quiet arg to suppress FB
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 19:00:34 +09:00
Hector Martin
f590ef73d0 m1n1.adt: Add field to pmgr devices
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 19:00:34 +09:00
Hector Martin
c76851ae11 m1n1.adt: Add pmap-io-ranges parsing
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 19:00:34 +09:00
Hector Martin
1e787e9d02 m1n1.adt: Add & use SafeGreedyRange
This avoids swallowing subcon errors silently, like GreedyRange does.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 19:00:34 +09:00
Hector Martin
95dd7b90a4 chickens: Add preliminary T6000 support
P-core chickens need checking.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 19:00:34 +09:00
Hector Martin
ed21a80bc3 chickens: Refactor and update M1 bits
This adds some missing fixes for M1/T8103 and reworks the code to split
off common parts, and also handle per-revision bits.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 13:41:12 +09:00
Hector Martin
7ff48f6201 memory: Make the RAM base dynamic
For now we compute this as phys_base aligned down to a 4GiB boundary.
Hopefully that works for future SoCs too.

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 13:39:40 +09:00
Hector Martin
38fc7a0780 Configure early debug features by SoC type
To build a version with early UART support, set it in config.h

Signed-off-by: Hector Martin <marcan@marcan.st>
2021-11-01 13:36:42 +09:00
Vincent Duvert
b15be6bcd7 Remove hardcoded UART/WDT addresses
The M1 Pro/Max Macs use a different base address for the UART and the
WDT than earlier models.

Remove hardcoded base addresses constants and replace them with loads
from the ADT.

- The base address of the WDT is already retrieved in wdt_disable; also
use this address when triggering a reboot.
- Retrieve the base address of uart0 in uart_init. If the operation
fails, the error will be signaled on the early uart (if not disabled).
- The early debug UART can’t use the ADT (or shouldn’t) so it is now
disabled by default. To enable it, add
-DEARLY_UART -DEARLY_UART_BASE=0xuart_address
to the CFLAGS.

Signed-off-by: Vincent Duvert <vincent@duvert.net>
2021-11-01 11:27:29 +09:00
Hector Martin
73180e29fa m1n1.hw.dart: Add show_error() and some more defs
Signed-off-by: Hector Martin <marcan@marcan.st>
2021-10-27 15:49:12 +09:00