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Fix warnings when building/linking with clang/llvm

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Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
Hector Martin 2021-11-08 13:37:39 +09:00
parent 1e6c856f5f
commit 84acf60c24
5 changed files with 10 additions and 8 deletions
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1
m1n1.ld
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@ -150,6 +150,7 @@ SECTIONS {
*(.rela.text.*)
*(.rela.data)
*(.rela.data.*)
*(.rela.dyn)
_rela_end = .;
. = ALIGN(0x4000);
} :rodata

6
src/dlmalloc/malloc.c
View file

@ -587,8 +587,12 @@ MAX_RELEASE_CHECK_RATE default: 4095 unless not HAVE_MMAP
#define MAX_SIZE_T (~(size_t)0)
#ifndef USE_LOCKS /* ensure true if spin or recursive locks set */
#define USE_LOCKS ((defined(USE_SPIN_LOCKS) && USE_SPIN_LOCKS != 0) || \
#if ((defined(USE_SPIN_LOCKS) && USE_SPIN_LOCKS != 0) || \
(defined(USE_RECURSIVE_LOCKS) && USE_RECURSIVE_LOCKS != 0))
#define USE_LOCKS 1
#else
#define USE_LOCKS 0
#endif
#endif /* USE_LOCKS */
#if USE_LOCKS /* Spin locks for gcc >= 4.1, older gcc on x86, MSC >= 1310 */

3
src/hv.h
View file

@ -65,8 +65,7 @@ void hv_vuart_poll(void);
void hv_map_vuart(u64 base, int irq, iodev_id_t iodev);
/* Exceptions */
void hv_exc_proxy(struct exc_info *ctx, uartproxy_boot_reason_t reason, uartproxy_exc_code_t type,
void *extra);
void hv_exc_proxy(struct exc_info *ctx, uartproxy_boot_reason_t reason, u32 type, void *extra);
/* WDT */
void hv_wdt_pet(void);

3
src/hv_exc.c
View file

@ -36,8 +36,7 @@ static u64 exc_entry_time;
extern u32 hv_cpus_in_guest;
void hv_exc_proxy(struct exc_info *ctx, uartproxy_boot_reason_t reason, uartproxy_exc_code_t type,
void *extra)
void hv_exc_proxy(struct exc_info *ctx, uartproxy_boot_reason_t reason, u32 type, void *extra)
{
int from_el = FIELD_GET(SPSR_M, ctx->spsr) >> 2;

5
src/pcie.c
View file

@ -191,8 +191,7 @@ int pcie_init(void)
return -1;
}
int port;
for (port = 0; port < port_count; port++) {
for (u32 port = 0; port < port_count; port++) {
char bridge[64];
printf("pcie: Initializing port %d\n", port);
@ -261,7 +260,7 @@ int pcie_shutdown(void)
if (!pcie_initialized)
return 0;
for (int port = 0; port < port_count; port++) {
for (u32 port = 0; port < port_count; port++) {
clear32(port_base[port] + APCIE_PORT_RESET, APCIE_PORT_RESET_DIS);
clear32(port_base[port] + APCIE_PORT_APPCLK, APCIE_PORT_APPCLK_EN);
}