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u-boot/arch/arm/cpu
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Akshay Saraswat f0f76b0a4c Exynos542x: cache: Disable clean/evict push to external 
L2 Auxiliary Control Register provides configuration
and control options for the L2 memory system. Bit 3
of L2ACTLR stands for clean/evict push to external.
Setting bit 3 disables clean/evict which is what
this patch intends to do.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-28 18:03:46 +09:00
..
arm720t ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00
arm920t ARM: remove a320evb board support 2015-02-24 17:07:17 -05:00
arm926ejs ARM: remove dkb board support 2015-02-24 17:07:03 -05:00
arm946es arm: move exception handling out of start.S files 2014-05-15 16:24:53 +02:00
arm1136 kbuild: use SoC-specific CONFIG to descend into SoC directory 2014-11-23 06:49:02 -05:00
arm1176 ARM: remove tnetv107x board support 2015-02-24 17:07:24 -05:00
armv7 Exynos542x: cache: Disable clean/evict push to external 2015-02-28 18:03:46 +09:00
armv8 drivers/mc: Migrated MC Flibs to 0.5.2 2015-02-24 13:10:20 -08:00
pxa arm: move exception handling out of start.S files 2014-05-15 16:24:53 +02:00
sa1100 arm: move exception handling out of start.S files 2014-05-15 16:24:53 +02:00
Makefile ARM: tegra: collect SoC sources into mach-tegra 2015-02-21 08:23:51 -05:00
u-boot-spl.lds arm: spl: Add I2C linker list in generic .lds 2014-12-11 09:38:35 -08:00
u-boot.lds ARM: HYP/non-sec: add separate section for secure code 2014-07-28 17:07:23 +02:00