York Sun eb53941206 powerpc/mpc85xx: software workaround for DDR erratum A-004468 ... Boot space translation utilizes the pre-translation address to select the DDR controller target. However, the post-translation address will be presented to the selected DDR controller. It is possible that the pre- translation address selects one DDR controller but the post-translation address exists in a different DDR controller when using certain DDR controller interleaving modes. The device may fail to boot under these circumstances. Note that a DDR MSE error will not be detected since DDR controller bounds registers are programmed to be the same when configured for DDR controller interleaving. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>		2012-10-22 14:31:28 -05:00
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common_timing_params.h	powerpc/8xxx: Enable DDR3 RDIMM support	2010-07-26 13:16:10 -05:00
ctrl_regs.c	powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation	2012-10-22 14:31:26 -05:00
ddr.h	powerpc/8xxx: Add support for interactive DDR programming interface	2011-10-09 17:57:53 -05:00
ddr1_dimm_params.c	GCC4.6: Squash warnings in ddr[123]_dimm_params.c	2011-10-27 23:54:00 +02:00
ddr2_dimm_params.c	GCC4.6: Squash warnings in ddr[123]_dimm_params.c	2011-10-27 23:54:00 +02:00
ddr3_dimm_params.c	powerpc/mpc8xxx: Add fine timing support for DDR3	2012-08-23 12:16:55 -05:00
interactive.c	powerpc/mpc8xxx: Update DDR registers	2012-10-22 14:31:26 -05:00
lc_common_dimm_params.c	powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation	2012-10-22 14:31:26 -05:00
main.c	powerpc/mpc8xxx: Fix DDR initialization waiting for D_INIT	2012-10-22 14:31:27 -05:00
Makefile	powerpc/8xxx: Add support for interactive DDR programming interface	2011-10-09 17:57:53 -05:00
options.c	powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation	2012-10-22 14:31:26 -05:00
util.c	powerpc/mpc85xx: software workaround for DDR erratum A-004468	2012-10-22 14:31:28 -05:00