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During LPDDR initialization we will loop through a series of frequency changes in order to train at the various operating frequencies. During this training, accessing the DRAM_CLASS bitfield could happen during a frequency change and cause the read to hang. Store the DRAM type into the main structure to avoid multiple readings while the independent phy is training. Signed-off-by: Bryan Brattlof <bb@ti.com> |
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| .. | ||
| aspeed | ||
| cadence | ||
| k3-ddrss | ||
| mediatek | ||
| octeon | ||
| renesas | ||
| rockchip | ||
| sifive | ||
| starfive | ||
| stm32mp1 | ||
| bmips_ram.c | ||
| imxrt_sdram.c | ||
| k3-am654-ddrss.c | ||
| k3-am654-ddrss.h | ||
| Kconfig | ||
| Makefile | ||
| mpc83xx_sdram.c | ||
| ram-uclass.c | ||
| sandbox_ram.c | ||
| stm32_sdram.c | ||