Rick Chen dda00ae4ef riscv: ax25: Andes specific cache shall only support in M-mode ... Limit the cache configuration only can be supported in M mode. It can not be manipulated in S mode. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>		2019-04-08 09:45:08 +08:00
..
arc	ARC: cache: define CONFIG_SYS_CACHELINE_SIZE as ARCH_DMA_MINALIGN	2019-01-25 08:41:09 +03:00
arm	Fixes for 2019.04	2019-04-05 09:09:56 -04:00
m68k	m68k: ColdFire mcf5441x, add eSDHC support	2018-09-16 00:01:13 +02:00
microblaze	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
mips	mips: add missing dtb-y to arch/mips/dts/Makefile	2019-03-22 12:15:12 -04:00
nds32	nds32: dts: Fix mmc node compatible string	2019-01-22 17:36:20 +08:00
nios2	.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore	2018-06-18 14:43:12 -04:00
powerpc	powerpc: fix arch/powerpc/dts/Makefile	2019-03-22 12:15:10 -04:00
riscv	riscv: ax25: Andes specific cache shall only support in M-mode	2019-04-08 09:45:08 +08:00
sandbox	clk: Add fixed-factor clock driver	2019-02-27 09:12:33 +08:00
sh	sh: bitops: add hweight*() macros	2019-02-07 15:33:21 +05:30
x86	x86: crownbay: Enable the beeper sound driver	2019-03-11 22:55:01 +08:00
xtensa	xtensa: use asm-generic/atomic.h	2018-09-25 21:49:18 -04:00
.gitignore
Kconfig	riscv: Enable create symlink using kconfig	2019-02-27 09:12:33 +08:00