Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-02-17 22:49:02 +00:00
Code Issues Projects Releases Packages Wiki Activity

riscv: ax25: Andes specific cache shall only support in M-mode

Browse source 
Limit the cache configuration only can be supported in M mode.
It can not be manipulated in S mode.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
This commit is contained in:
Rick Chen 2019-04-02 15:56:42 +08:00 • committed by Andes
parent 8848474c5e
commit dda00ae4ef
1 changed files with 1 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
arch/riscv/cpu/ax25/Kconfig
View file

@ -14,6 +14,7 @@ if RISCV_NDS
config RISCV_NDS_CACHE
bool "AndeStar V5 families specific cache support"
depends on RISCV_MMODE
help
Provide Andes Technology AndeStar V5 families specific cache support.