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Ls1028a SoC is based on Layerscape Chassis Generation 3.2 architecture with features: 2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers, 6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc. Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
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| .. | ||
| doc | ||
| cpu.c | ||
| cpu.h | ||
| fdt.c | ||
| fsl_lsch2_serdes.c | ||
| fsl_lsch2_speed.c | ||
| fsl_lsch3_serdes.c | ||
| fsl_lsch3_speed.c | ||
| icid.c | ||
| Kconfig | ||
| lowlevel.S | ||
| ls1012a_serdes.c | ||
| ls1028a_serdes.c | ||
| ls1043_ids.c | ||
| ls1043a_psci.S | ||
| ls1043a_serdes.c | ||
| ls1046_ids.c | ||
| ls1046a_serdes.c | ||
| ls1088a_serdes.c | ||
| ls2080a_serdes.c | ||
| lx2160a_serdes.c | ||
| Makefile | ||
| mp.c | ||
| ppa.c | ||
| soc.c | ||
| spl.c | ||