mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 16:07:30 +00:00
83843c9b3a
The Allwinner A64 SoC starts execution in AArch32 mode, and both the boot ROM and Allwinner's boot0 keep running in this mode. So U-Boot gets entered in 32-bit, although we want it to run in AArch64. By using a "magic" instruction, which happens to be an almost-NOP in AArch64 and a branch in AArch32, we differentiate between being entered in 64-bit or 32-bit mode. If in 64-bit mode, we proceed with the branch to reset, but in 32-bit mode we trigger an RMR write to bring the core into AArch64/EL3 and re-enter U-Boot at CONFIG_SYS_TEXT_BASE. This allows a 64-bit U-Boot to be both entered in 32 and 64-bit mode, so we can use the same start code for the SPL and the U-Boot proper. We use the existing custom header (boot0.h) functionality, but restrict the existing boot0 header reservation to the non-SPL build now. A SPL wouldn't need such header anyway. This allows to have both options defined and lets us use one for the SPL and the other for U-Boot proper. Also add arch/arm/mach-sunxi/rmr_switch.S, which contains the original ARM assembly code and instructions how to re-generate the encoded version. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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| .. | ||
| boot0.h | ||
| clock.h | ||
| clock_sun4i.h | ||
| clock_sun6i.h | ||
| clock_sun8i_a83t.h | ||
| clock_sun9i.h | ||
| cpu.h | ||
| cpu_sun4i.h | ||
| cpu_sun9i.h | ||
| cpucfg.h | ||
| display.h | ||
| dma.h | ||
| dma_sun4i.h | ||
| dram.h | ||
| dram_sun4i.h | ||
| dram_sun6i.h | ||
| dram_sun8i_a23.h | ||
| dram_sun8i_a33.h | ||
| dram_sun8i_a83t.h | ||
| dram_sun8i_h3.h | ||
| dram_sun9i.h | ||
| gpio.h | ||
| gtbus.h | ||
| gtbus_sun9i.h | ||
| i2c.h | ||
| mmc.h | ||
| p2wi.h | ||
| pmic_bus.h | ||
| prcm.h | ||
| pwm.h | ||
| rsb.h | ||
| spl.h | ||
| sys_proto.h | ||
| timer.h | ||
| tzpc.h | ||
| usb_phy.h | ||
| watchdog.h | ||