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sunxi: Add support for the I2C controller which is part of the PRCM
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
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904dfbfd67
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9d0826879e
11 changed files with 55 additions and 1 deletions
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@ -77,6 +77,16 @@ int clock_twi_onoff(int port, int state)
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struct sunxi_ccm_reg *const ccm =
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(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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if (port == 5) {
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if (state)
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prcm_apb0_enable(
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PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
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else
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prcm_apb0_disable(
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PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_I2C);
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return 0;
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}
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/* set the apb clock gate for twi */
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if (state)
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setbits_le32(&ccm->apb2_gate,
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@ -33,3 +33,15 @@ void prcm_apb0_enable(u32 flags)
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/* deassert reset for module */
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setbits_le32(&prcm->apb0_reset, flags);
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}
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void prcm_apb0_disable(u32 flags)
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{
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struct sunxi_prcm_reg *prcm =
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(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
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/* assert reset for module */
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clrbits_le32(&prcm->apb0_reset, flags);
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/* close the clock for module */
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clrbits_le32(&prcm->apb0_gate, flags);
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}
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@ -134,6 +134,7 @@
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#define SUNXI_RTC_BASE 0x01f00000
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#define SUNXI_PRCM_BASE 0x01f01400
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#define SUN6I_CPUCFG_BASE 0x01f01c00
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#define SUNXI_R_TWI_BASE 0x01f02400
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#define SUNXI_R_UART_BASE 0x01f02800
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#define SUNXI_R_PIO_BASE 0x01f02c00
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#define SUN6I_P2WI_BASE 0x01f03400
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@ -199,6 +199,8 @@ enum sunxi_gpio_number {
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#define SUN6I_GPL1_R_P2WI_SDA 3
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#define SUN8I_GPL_R_RSB 2
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#define SUN8I_H3_GPL_R_TWI 2
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#define SUN8I_A23_GPL_R_TWI 3
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#define SUN8I_GPL_R_UART 2
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#define SUN9I_GPN_R_RSB 3
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@ -23,6 +23,9 @@
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#ifdef CONFIG_I2C4_ENABLE
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#define CONFIG_I2C_MVTWSI_BASE4 SUNXI_TWI4_BASE
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#endif
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#ifdef CONFIG_R_I2C_ENABLE
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#define CONFIG_I2C_MVTWSI_BASE5 SUNXI_R_TWI_BASE
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#endif
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/* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */
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#define CONFIG_SYS_TCLK 24000000
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@ -236,5 +236,7 @@ struct sunxi_prcm_reg {
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};
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void prcm_apb0_enable(u32 flags);
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void prcm_apb0_disable(u32 flags);
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#endif /* __ASSEMBLY__ */
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#endif /* _PRCM_H */
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@ -363,6 +363,12 @@ config I2C3_ENABLE
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See I2C0_ENABLE help text.
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endif
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config R_I2C_ENABLE
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bool "Enable the PRCM I2C/TWI controller"
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default n
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---help---
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Set this to y to enable the I2C controller which is part of the PRCM.
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if MACH_SUN7I
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config I2C4_ENABLE
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bool "Enable I2C/TWI controller 4"
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@ -422,6 +422,12 @@ void i2c_init_board(void)
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clock_twi_onoff(4, 1);
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#endif
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#endif
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#ifdef CONFIG_R_I2C_ENABLE
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clock_twi_onoff(5, 1);
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sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI);
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sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI);
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#endif
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}
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#ifdef CONFIG_SPL_BUILD
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@ -12,3 +12,4 @@ CONFIG_SPL=y
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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CONFIG_CMD_GPIO=y
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CONFIG_R_I2C_ENABLE=y
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@ -127,6 +127,10 @@ static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
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#ifdef CONFIG_I2C_MVTWSI_BASE4
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case 4:
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return (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE4;
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE5
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case 5:
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return (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE5;
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#endif
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default:
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printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
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@ -487,3 +491,10 @@ U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
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CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
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#endif
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#ifdef CONFIG_I2C_MVTWSI_BASE5
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U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
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twsi_i2c_read, twsi_i2c_write,
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twsi_i2c_set_bus_speed,
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CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
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#endif
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@ -212,7 +212,7 @@
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#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
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defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
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defined CONFIG_I2C4_ENABLE
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defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MVTWSI
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#define CONFIG_SYS_I2C_SPEED 400000
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