Yanhong Wang 38d900b409 ram: starfive: Read memory size information from EEPROM ... StarFive VisionFive 2 has two versions, 1.2A and 1.3B, each version of DDR capacity includes 2G/4G/8G, a DT can not support multiple capacities, so the capacity size information is recorded to EEPROM, when DDR initialization required capacity size information is read from EEPROM. If there is no information in EEPROM, it is initialized with the default size defined in DT. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>		2023-07-12 13:21:40 +08:00
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andesv5	riscv: Rename Andes cpu and board names	2023-02-17 19:07:48 +08:00
fu540	board_f: Fix types for board_get_usable_ram_top()	2022-09-23 15:12:42 -04:00
fu740	board_f: Fix types for board_get_usable_ram_top()	2022-09-23 15:12:42 -04:00
generic	board_f: Fix types for board_get_usable_ram_top()	2022-09-23 15:12:42 -04:00
jh7110	ram: starfive: Read memory size information from EEPROM	2023-07-12 13:21:40 +08:00
cpu.c	dm: Emit the arch_cpu_init_dm() even only before relocation	2023-05-11 10:25:29 +08:00
Makefile	riscv: Move trap handler codes to mtrap.S	2018-12-18 09:56:27 +08:00
mtrap.S	riscv: Add option to print registers on exception	2020-02-10 14:51:08 +08:00
start.S	riscv: spl: Remove relocation sections	2023-04-20 20:45:08 +08:00
u-boot-spl.lds	riscv: Update alignment for some sections in linker scripts	2023-04-20 20:45:08 +08:00
u-boot.lds	riscv: Fix alignment of RELA sections in the linker scripts	2023-06-27 10:09:51 +08:00