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riscv: Fix alignment of RELA sections in the linker scripts

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In current linker script both .efi_runtime_rel and .rela.dyn sections
are of RELA type whose entry size is either 12 (RV32) or 24 (RV64).
These two are arranged as a continuous region on purpose so that the
prelink-riscv executable can fix up the PIE addresses in one loop.

However there is an 'ALIGN(8)' between these 2 sections which might
cause a gap to be inserted between these 2 sections to satisfy the
alignment requirement on RV32. This would break the assumption of
the prelink process and generate an unbootable image.

Fixes: 9a6569a043 ("riscv: Update alignment for some sections in linker scripts")
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
This commit is contained in:
Bin Meng 2023-06-27 09:24:56 +08:00 • committed by Leo Yu-Chi Liang
parent 217b6373b5
commit 4a3efd71cd
1 changed files with 1 additions and 3 deletions
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4
arch/riscv/cpu/u-boot.lds
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@ -48,7 +48,7 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
}
. = ALIGN(4);
. = ALIGN(8);
.efi_runtime_rel : {
__efi_runtime_rel_start = .;
@ -57,8 +57,6 @@ SECTIONS
__efi_runtime_rel_stop = .;
}
. = ALIGN(8);
/DISCARD/ : { *(.rela.plt*) }
.rela.dyn : {
__rel_dyn_start = .;