u-boot/drivers/clk/renesas
Marek Vasut fd5577ce26 clk: rmobile: Assure SD-IF clock are configured correctly
The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate()
implementation in the clock driver does not set the SD-IF divider. Fix it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
..
clk-rcar-gen2.c clk: renesas: Add Gen2 clock core 2018-01-24 23:27:22 +01:00
clk-rcar-gen3.c clk: rmobile: Assure SD-IF clock are configured correctly 2018-02-16 16:43:09 +01:00
Kconfig clk: renesas: Import R8A7794 E2 clock tables 2018-01-24 23:27:22 +01:00
Makefile clk: renesas: Import R8A7794 E2 clock tables 2018-01-24 23:27:22 +01:00
r8a7790-cpg-mssr.c clk: renesas: Import R8A7790 H2 clock tables 2018-01-24 23:27:22 +01:00
r8a7791-cpg-mssr.c clk: renesas: Import R8A7791/R8A7793 M2 clock tables 2018-01-24 23:27:22 +01:00
r8a7792-cpg-mssr.c clk: renesas: Import R8A7792 V2H clock tables 2018-01-24 23:27:22 +01:00
r8a7794-cpg-mssr.c clk: renesas: Import R8A7794 E2 clock tables 2018-01-24 23:27:22 +01:00
r8a7795-cpg-mssr.c clk: renesas: Split SMSTPCR and RMSTPCR tables 2018-01-24 23:27:22 +01:00
r8a7796-cpg-mssr.c clk: renesas: Split SMSTPCR and RMSTPCR tables 2018-01-24 23:27:22 +01:00
r8a77970-cpg-mssr.c clk: renesas: Split SMSTPCR and RMSTPCR tables 2018-01-24 23:27:22 +01:00
r8a77995-cpg-mssr.c clk: renesas: Split SMSTPCR and RMSTPCR tables 2018-01-24 23:27:22 +01:00
rcar-gen2-cpg.h clk: renesas: Add Gen2 clock core 2018-01-24 23:27:22 +01:00
rcar-gen3-cpg.h clk: renesas: Pull Gen3 specific bits into separate header 2018-01-24 23:27:22 +01:00
renesas-cpg-mssr.c Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh 2018-01-27 18:25:00 -05:00
renesas-cpg-mssr.h clk: renesas: Add Gen2 clock core 2018-01-24 23:27:22 +01:00