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K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks into the device. This DDR subsystem provides an interface to external SDRAM devices. Adding support for the initialization of the external SDRAM devices by configuring the DDRSS registers and using the buitin PHY routines. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com> |
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chromium | ||
device-tree-bindings | ||
driver-model | ||
imx | ||
mvebu | ||
SPI | ||
SPL | ||
uImage.FIT | ||
bounces | ||
feature-removal-schedule.txt | ||
git-mailrc | ||
I2C_Edge_Conditions | ||
kwboot.1 | ||
mkimage.1 | ||
README.440-DDR-performance | ||
README.ae350 | ||
README.ag101p | ||
README.AMCC-eval-boards-cleanup | ||
README.android-fastboot | ||
README.android-fastboot-protocol | ||
README.ARC | ||
README.arm-caches | ||
README.ARM-memory-map | ||
README.arm-relocation | ||
README.arm64 | ||
README.armada-secureboot | ||
README.at91 | ||
README.atmel_mci | ||
README.atmel_pmecc | ||
README.autoboot | ||
README.avb2 | ||
README.AX25 | ||
README.b4860qds | ||
README.bcm7xxx | ||
README.bedbug | ||
README.bitbangMII | ||
README.blackfin | ||
README.bootmenu | ||
README.boston | ||
README.bus_vcxk | ||
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README.coccinelle | ||
README.commands | ||
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README.commands.spl | ||
README.console | ||
README.davinci | ||
README.davinci.nand_spl | ||
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README.displaying-bmps | ||
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README.drivers.eth | ||
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README.fdt-control | ||
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README.fec_mxc | ||
README.fsl-clk | ||
README.fsl-ddr | ||
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README.gpt | ||
README.Heterogeneous-SoCs | ||
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README.i2c | ||
README.iomux | ||
README.iscsi | ||
README.JFFS2 | ||
README.JFFS2_NAND | ||
README.kconfig | ||
README.kwbimage | ||
README.LED | ||
README.LED_display | ||
README.link-local | ||
README.log | ||
README.lynxkdi | ||
README.m68k | ||
README.m54418twr | ||
README.malta | ||
README.marubun-pcmcia | ||
README.marvell | ||
README.memory-test | ||
README.menu | ||
README.mips | ||
README.mpc74xx | ||
README.mpc83xx.ddrecc | ||
README.mpc83xxads | ||
README.mpc85xx | ||
README.mpc85xx-sd-spi-boot | ||
README.mpc85xx-spin-table | ||
README.mpc85xxcds | ||
README.multi-dtb-fit | ||
README.mxc_ocotp | ||
README.N1213 | ||
README.nand | ||
README.nand-boot-ppc440 | ||
README.NDS32 | ||
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README.NetConsole | ||
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README.nokia_rx51 | ||
README.nvme | ||
README.odroid | ||
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README.omap-ulpi-viewport | ||
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README.pblimage | ||
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README.sched | ||
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README.serial_multi | ||
README.sh | ||
README.sh7752evb | ||
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README.sha1 | ||
README.silent | ||
README.SNTP | ||
README.socfpga | ||
README.spear | ||
README.SPL | ||
README.splashprepare | ||
README.srio-pcie-boot-corenet | ||
README.standalone | ||
README.t1040-l2switch | ||
README.tee | ||
README.ti-secure | ||
README.TPL | ||
README.trace | ||
README.u-boot_on_efi | ||
README.ubi | ||
README.ubispl | ||
README.ublimage | ||
README.uefi | ||
README.unaligned-memory-access.txt | ||
README.uniphier | ||
README.update | ||
README.usb | ||
README.vf610 | ||
README.video | ||
README.virtio | ||
README.VLAN | ||
README.VSC3316-3308 | ||
README.vxworks | ||
README.watchdog | ||
README.x86 | ||
README.xtensa | ||
README.zfs | ||
README.zynq |
# SPDX-License-Identifier: GPL-2.0+ # # Xilinx ZYNQ U-Boot # # (C) Copyright 2013 Xilinx, Inc. 1. About this This document describes the information about Xilinx Zynq U-Boot - like supported boards, ML status and TODO list. 2. Zynq boards Xilinx Zynq-7000 All Programmable SoCs enable extensive system level differentiation, integration, and flexibility through hardware, software, and I/O programmability. * zc702 (single qspi, gem0, mmc) [1] * zc706 (dual parallel qspi, gem0, mmc) [2] * zed (single qspi, gem0, mmc) [3] * microzed (single qspi, gem0, mmc) [4] * zc770 - zc770-xm010 (single qspi, gem0, mmc) - zc770-xm011 (8 or 16 bit nand) - zc770-xm012 (nor) - zc770-xm013 (dual parallel qspi, gem1) 3. Building ex. configure and build for zc702 board $ make zynq_zc702_config $ make 4. Bootmode Zynq has a facility to read the bootmode from the slcr bootmode register once user is setting through jumpers on the board - see page no:1546 on [5] All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins on [5]. board_late_init() will read the bootmode values using slcr bootmode register at runtime and assign the modeboot variable to specific bootmode string which is intern used in autoboot. SLCR bootmode register Bit[3:0] values #define ZYNQ_BM_NOR 0x02 #define ZYNQ_BM_SD 0x05 #define ZYNQ_BM_JTAG 0x0 "modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot" bootmode strings at runtime. 5. Mainline status - Added basic board configurations support. - Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq - Added zynq boards named - zc70x, zed, microzed, zc770_xm010/xm011/xm012/xm013 - Added zynq drivers: serial - drivers/serial/serial_zynq.c net - drivers/net/zynq_gem.c mmc - drivers/mmc/zynq_sdhci.c spi - drivers/spi/zynq_spi.c qspi - drivers/spi/zynq_qspi.c i2c - drivers/i2c/zynq_i2c.c nand - drivers/mtd/nand/raw/zynq_nand.c - Done proper cleanups on board configurations - Added basic FDT support for zynq boards - d-cache support for zynq_gem.c 6. TODO - Add FDT support on individual drivers [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm [3] http://zedboard.org/product/zedboard [4] http://zedboard.org/product/microzed [5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf -- Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Sun Dec 15 14:52:41 IST 2013