Andre Przywara d6cb09d89d clk: sunxi: add and use dummy gate clocks ... Some devices enumerate various clocks in their DT, and many drivers just blanketly try to enable all of them. This creates problems since we only model a few gate clocks, and the clock driver outputs a warning when a clock is not described: ========= sunxi_set_gate: (CLK#3) unhandled ========= Some clocks don't have an enable bit, or are already enabled in a different way, so we might want to just ignore them. Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define a GATE_DUMMY macro that can be used in the clock description array. Define a few clocks, used by some pinctrl devices, that way to suppress the runtime warnings. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org>		2022-05-24 01:16:15 +01:00
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clk_a10.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_a10s.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_a23.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_a31.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_a31_r.c	clk: sunxi: Add drivers for A31 and H6 PRCM CCUs	2021-10-11 10:46:44 +01:00
clk_a64.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_a80.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_a83t.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_f1c100s.c	clk: sunxi: implement clock driver for suniv f1c100s	2022-05-23 00:37:51 +01:00
clk_h3.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_h6.c	clk: sunxi: add and use dummy gate clocks	2022-05-24 01:16:15 +01:00
clk_h6_r.c	clk: sunxi: add and use dummy gate clocks	2022-05-24 01:16:15 +01:00
clk_h616.c	clk: sunxi: add and use dummy gate clocks	2022-05-24 01:16:15 +01:00
clk_r40.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
clk_sun6i_rtc.c	clk: sunxi: Add a dummy clock driver for the RTC	2021-04-16 01:12:59 +01:00
clk_sunxi.c	clk: sunxi: add and use dummy gate clocks	2022-05-24 01:16:15 +01:00
clk_v3s.c	clk: sunxi: add PIO bus gate clocks	2022-05-24 01:15:09 +01:00
Kconfig	clk: sunxi: implement clock driver for suniv f1c100s	2022-05-23 00:37:51 +01:00
Makefile	clk: sunxi: implement clock driver for suniv f1c100s	2022-05-23 00:37:51 +01:00