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clk: sunxi: Add a dummy clock driver for the RTC

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The 32kHz clock ("LOSC") on sunxi SoCs is provided by the RTC. It is
used, among other things, by the XHCI controller in the H6. To be able
to call clk_get_bulk() on the XHCI controller, some device needs to
provide all referenced clocks.

Since LOSC is a fixed-rate always-on clock, implementation is trivial.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Samuel Holland 2021-02-07 23:57:19 -06:00 committed by Andre Przywara
parent a5ff6f5c72
commit 9078b67f3c
2 changed files with 37 additions and 0 deletions
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2
drivers/clk/sunxi/Makefile
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@ -6,6 +6,8 @@
obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o
obj-$(CONFIG_CLK_SUNXI) += clk_sun6i_rtc.o
obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o
obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o
obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o

35
drivers/clk/sunxi/clk_sun6i_rtc.c Normal file
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@ -0,0 +1,35 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 Amarula Solutions.
* Copyright (C) 2020 Samuel Holland <samuel@sholland.org>
*/
#include <clk-uclass.h>
#include <dm.h>
static int clk_sun6i_rtc_enable(struct clk *clk)
{
return 0;
}
static const struct clk_ops clk_sun6i_rtc_ops = {
.enable = clk_sun6i_rtc_enable,
};
static const struct udevice_id sun6i_rtc_ids[] = {
{ .compatible = "allwinner,sun6i-a31-rtc" },
{ .compatible = "allwinner,sun8i-a23-rtc" },
{ .compatible = "allwinner,sun8i-h3-rtc" },
{ .compatible = "allwinner,sun8i-r40-rtc" },
{ .compatible = "allwinner,sun8i-v3-rtc" },
{ .compatible = "allwinner,sun50i-h5-rtc" },
{ .compatible = "allwinner,sun50i-h6-rtc" },
{ }
};
U_BOOT_DRIVER(clk_sun6i_rtc) = {
.name = "clk_sun6i_rtc",
.id = UCLASS_CLK,
.of_match = sun6i_rtc_ids,
.ops = &clk_sun6i_rtc_ops,
};