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Previously, dynamic frequency scaling supported rates only through fixed divison. This virtual clock mux configuration enables more varied rates on A72 clock ID 202 by setting up the required register. Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Signed-off-by: Reid Tonking <reidt@ti.com> |
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arc | ||
arm | ||
m68k | ||
microblaze | ||
mips | ||
nios2 | ||
powerpc | ||
riscv | ||
sandbox | ||
sh | ||
x86 | ||
xtensa | ||
.gitignore | ||
Kconfig | ||
Kconfig.nxp | ||
u-boot-elf.lds |