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u-boot/drivers/clk
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Marek Behún 239f424f49 clk: armada-37xx-periph: fix DDR PHY clock divider values 
Register value table for DDR PHY clock divider are wrong. They should be
0 or 1 for divide-by-2 or divide-by-4, respectively. Not 1 or 2. Current
values do not make sense, since 2 cannot be achieved, because the
register is only 1 bit long (mask is set to 1).

This fixes clk dump reporting DDR PHY clock rate differently from Linux.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
..
altera dm: core: remove the duplicated function dm_ofnode_pre_reloc 2020-04-16 08:07:58 -06:00
analogbits clk: sifive: Sync-up WRPLL library with upstream Linux 2019-07-19 14:24:51 +08:00
aspeed dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
at91 dm: core: remove the duplicated function dm_ofnode_pre_reloc 2020-04-16 08:07:58 -06:00
exynos clk: Remove DM_FLAG_PRE_RELOC flag in various drivers 2018-11-14 09:16:28 -08:00
imx clk: imx: add i.IMXRT1020 clk driver 2020-04-18 14:54:28 +02:00
intel x86: remove dead code in intel_clk_get_rate() 2020-03-05 18:19:40 +08:00
mediatek clk: mediatek: use unsigned type for returning the clk rate 2020-01-26 12:03:06 +01:00
meson clk: meson: reset mmc clock on probe 2020-04-06 09:56:35 +02:00
mtmips clk: add clock driver for MediaTek MT76x8 platform 2019-10-25 17:20:44 +02:00
mvebu clk: armada-37xx-periph: fix DDR PHY clock divider values 2020-04-22 14:28:15 +02:00
owl clk: Remove DM_FLAG_PRE_RELOC flag in various drivers 2018-11-14 09:16:28 -08:00
renesas clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2 2020-03-30 03:49:23 +02:00
rockchip clk: rk3399: Set empty for vopl assigned-clocks 2020-04-02 15:44:56 +02:00
sifive dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
sunxi sunxi: clocks: Add H6 USB clock gates and resets 2019-07-16 17:13:15 +05:30
tegra dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
uniphier dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk-cdce9xx.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk-composite.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-divider.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-fixed-factor.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-gate.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-hsdk-cgu.c ARC: HSDK: CGU: fix tunnel clock calculation 2020-04-16 23:37:10 +03:00
clk-mux.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk-ti-sci.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk-uclass.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk.c clk: show more error info when uclass_get_device_by_name 2020-01-26 12:03:06 +01:00
clk_bcm6345.c clk: bcm6345: convert to use live dt 2018-06-01 15:56:02 +02:00
clk_boston.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_fixed_factor.c dm: core: Require users of devres to include the header 2020-02-05 19:33:46 -07:00
clk_fixed_rate.c clk: fixed_rate: add dummy enable() function 2020-01-16 09:39:45 -05:00
clk_pic32.c common: Move get_tbclk() to time.h 2020-01-17 13:27:30 -05:00
clk_sandbox.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_sandbox_ccf.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_sandbox_test.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_stm32f.c clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock 2018-05-08 09:07:34 -04:00
clk_stm32h7.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_stm32mp1.c configs: stm32mp1: replace STM32MP1_TRUSTED by TFABOOT 2020-04-15 09:08:37 +02:00
clk_versal.c versal: drivers: clk: Fix invalid clock name queries 2020-02-28 12:04:10 +01:00
clk_vexpress_osc.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_zynq.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
clk_zynqmp.c dm: core: Create a new header file for 'compat' features 2020-02-05 19:33:46 -07:00
ics8n3qv01.c clk: Add ICS8N3QV01 driver 2018-05-08 18:50:23 -04:00
Kconfig x86: Add a clock driver for Intel devices 2020-02-07 22:41:24 +08:00
Makefile x86: Add a clock driver for Intel devices 2020-02-07 22:41:24 +08:00
mpc83xx_clk.c common: Move clock functions into a new file 2020-01-17 13:27:29 -05:00
mpc83xx_clk.h clk: Add MPC83xx clock driver 2018-09-18 00:01:18 -06:00