The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().
Rename it to resolve this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
In order to move ppc-specific code out of setup_dest_addr(), provide an
arch-specific variant arch_setup_dest_addr(), that can be used by
architecture code to fix up the initial reloc address.
It is called at the end of setup_dest_addr() initcall and the default
implementation is a nop stub.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
The XTRN_DECLARE_GLOBAL_DATA_PTR declarations in ppc code are permanently
commented out, so there are no users for this macro:
#if 1
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
#else /* We could use plain global data, but the resulting code is bigger */
#define XTRN_DECLARE_GLOBAL_DATA_PTR extern
#define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \
gd_t *gd
#endif
Remove all references to this macro, but add a documentation note regarding
the possibility of using plain global data for the GD pointer.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
During init_dram() is called also setup_ddr_tlbs_phys() function which may
print message about unmapped DDR memory. So in this case print also
re-aligning filler after unmapped DDR memory message.
Signed-off-by: Pali Rohár <pali@kernel.org>
Currently U-Boot SPL prints just generic message "2 GiB left unmapped".
Change it to more detailed "2 GiB of DDR memory left unmapped in U-Boot".
This is just U-Boot configuration and operating system may map more (or
also less) memory.
Signed-off-by: Pali Rohár <pali@kernel.org>
I messed up application of patch 5a428e7510 ("mmc: fsl_esdhc_spl: Add
support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS"). I took it from
a work-in-progress branch where I changed usage of
CONFIG_SDCARD to CONFIG_SD_BOOT
and refactored
SYS_MPC85XX_NO_RESETVEC
mess.
But these changes aren't in master yet. Fix the wrong usage of these
macros.
Fixes: 5a428e7510 ("mmc: fsl_esdhc_spl: Add support for builds without
CONFIG_SYS_MMC_U_BOOT_OFFS")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Only one occurance of WATCHDOG_RESET is left in one assembler file.
This patch changes this occurance to a direct call to watchdog_reset
and then removes all the ASSEMBLY ifdef'ery in watchdog.h, as it's not
needed any more to clean this mess a bit up.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
Globally replace all occurances of WATCHDOG_RESET() with schedule(),
which handles the HW_WATCHDOG functionality and the cyclic
infrastructure.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm, mx6cuboxi, rpi_3,dra7xx_evm, pine64_plus, am65x_evm, j721e_evm]
When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then
expects that U-Boot proper is placed immediately after SPL without any
additional padding.
This allows to generate smaller SPL+U-Boot final binary as it is not
required to specify fixed offset to U-Boot proper at SPL compile time.
In this case offset to U-Boot proper is calculated at SPL compile time in
linker script.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy
trims trailing zero bytes when converting ELF file to RAW binary.
This is same fix for SPL linker script as was done fix for U-Boot linker
script in commit e8c0e0064c ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE
support").
It is required for the patch "mmc: fsl_esdhc_spl: Add support for builds
without CONFIG_SYS_MMC_U_BOOT_OFFS" which triggered this issue in SPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Commit d433c74eec ("Convert CONFIG_SDCARD et al to Kconfig") converted
SYS_EXTRA_OPTIONS=SDCARD or SPIFLASH to config options CONFIG_SDCARD and
CONFIG_SPIFLASH, but left one occurance unchanged.
Fix this.
Fixes: d433c74eec ("Convert CONFIG_SDCARD et al to Kconfig")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Building of final u-boot.bin binary for mpc85xx via binman is needed only
when inserting DTB binary in the middle of the u-boot ELF binary (before
.bootpg and .resetvec ELF sections).
These requirements are met when CONFIG_MPC85XX_HAVE_RESET_VECTOR is enabled
(= generating .bootpg/.resetvec sections) and CONFIG_OF_SEPARATE is enabled
(= inserting DTB binary).
So in all other cases use standard build procedure instead of custom
mpc85xx u-boot.bin Makefile target via binman.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Currently Makefile produces final mpc85xx image when SPL is not used in
custom file u-boot-with-dtb.bin. It is quite confusing name as build
process produce also intermediate file standard file u-boot-dtb.bin (which
is just intermediate and not bootable). Other platforms use u-boot.bin
(UBOOT_BIN) as standard name for final bootable raw image.
So change Makefile rules and binman to produce final bootable file for
mpc85xx also into file u-boot.bin. There is just need for mpc85xx to not
define default rule for u-boot.bin then instruct binman (via DTS file) to
store final image into u-boot.bin (instead of u-boot-with-dtb.bin) and
finally rename target u-boot-with-dtb.bin to u-boot.bin.
With this change are also removed custom Makefile hacks for mpc85xx that it
produced non-standard output file. And also updated documentation.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Behún <kabel@kernel.org>
P1/P2 RDB boards have external max6370 watchdog connected to CPLD and this
watchdog is not deactivated on board reset. So if it is active during board
reset, it can trigger another reset when CPU is booting U-Boot. To prevent
possible infinite reset loop caused by external watchdog, turn it off
before reset.
Do it via a new board_reset_prepare() callback which is called from
do_reset() function before any reset sequence.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
CPLD's system reset register is buggy and requires workaround in U-Boot.
So use this kind of board reset only when there is no other reset option.
Introduce a new board_reset_last() callback which is last-stage
board-specific reset and implement CPLD's system reset in this new
board_reset_last() callback instead of board_reset() callback.
Fixes: 20fb58fc5a ("board: freescale: p1_p2_rdb_pc: Implement board_reset()")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The kmtegr1 board is out of maintenance and can be removed. As it is the
only board in the tree using MPC8309 the support for this CPU is dropped
completely.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
These boards have been orphaned for some time and are behind on various
DM migrations. Remove them.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
This converts the following to Kconfig:
CONFIG_FSL_NGPIXIS
CONFIG_SYS_FSL_QMAN_V3
CONFIG_SYS_FSL_RAID_ENGINE
CONFIG_SYS_FSL_RMU
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
CONFIG_SYS_FSL_SRIO_LIODN
CONFIG_SYS_FSL_TBCLK_DIV
CONFIG_SYS_FSL_USB1_PHY_ENABLE
CONFIG_SYS_FSL_USB2_PHY_ENABLE
CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_PCIE_COMPAT
To do this, introduce a choice and option for each of the strings used
and set CONFIG_SYS_FSL_PCIE_COMPAT based on that.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_CORES_PER_CLUSTER
As part of this, correct the dependencies on SYS_FSL_THREADS_PER_CORE.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_CCSR_GUR_BE
CONFIG_SYS_FSL_CCSR_SCFG_BE
CONFIG_SYS_FSL_ESDHC_BE
CONFIG_SYS_FSL_IFC_BE
CONFIG_SYS_FSL_PEX_LUT_BE
CONFIG_SYS_FSL_CCSR_GUR_LE
CONFIG_SYS_FSL_CCSR_SCFG_LE
CONFIG_SYS_FSL_ESDHC_LE
CONFIG_SYS_FSL_IFC_LE
CONFIG_SYS_FSL_PEX_LUT_LE
Signed-off-by: Tom Rini <trini@konsulko.com>
QorIQ U-Boot binary for SD card booting compiled during build process
(either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by
QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed
by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot
BootROM requires that image on SD card must contain special boot sector.
Implement support for generating this special boot sector directly in
U-Boot start code. Boot sector needs to be at the beginning of the image,
so when compiling only proper U-Boot without SPL then it needs to be in
proper U-Boot. When compiling SPL with proper U-Boot then it needs to be
only in SPL.
Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR.
Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and
FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot
image could be stored on the SD card.
Signed-off-by: Pali Rohár <pali@kernel.org>
With commit ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.
Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
As things stand currently, there is only one PowerPC platform that
enables the options for CHAIN_OF_TRUST. From the board header files,
remove a number of never-set options. Remove board specific values from
arch/powerpc/include/asm/fsl_secure_boot.h as well. Rework
include/config_fsl_chain_trust.h to not abuse the CONFIG namespace for
constructing CHAIN_BOOT_CMD. Migrate all of the configurable addresses
to Kconfig.
If any platforms are re-introduced with secure boot support, everything
required should still be here, but now in Kconfig, or requires migration
of an option to Kconfig.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Move setting of SPL_UBOOT_KEY_HASH to a non-NULL value to Kconfig. As
part of this, change fsl_secboot_validate(...) to check that it is
passed a non-empty string, rather than non-NULL.
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Make all of the CHAIN_OF_TRUST options be under a single menu and add a
comment for the rest, so the resulting config file reads more clearly.
Remove duplicate CHAIN_OF_TRUST options from
board/congatec/common/Kconfig. Remove duplicate NXP_ESBC config
questions and move to arch/Kconfig.nxp.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_KEY_REVOCATION
CONFIG_SYS_FSL_SFP_BE
CONFIG_SYS_FSL_SFP_LE
CONFIG_SYS_FSL_SFP_VER_3_0
CONFIG_SYS_FSL_SFP_VER_3_2
CONFIG_SYS_FSL_SFP_VER_3_4
CONFIG_SYS_FSL_SRK_LE
This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for
when CHAIN_OF_TRUST is enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_FSL_SEC_MON
CONFIG_SYS_FSL_SEC_MON_BE
CONFIG_SYS_FSL_SEC_MON_LE
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_HETROGENOUS_CLUSTERS
CONFIG_SYS_MAPLE
CONFIG_SYS_CPRI
CONFIG_PPC_CLUSTER_START
CONFIG_DSP_CLUSTER_START
CONFIG_SYS_CPRI_CLK
CONFIG_SYS_ULB_CLK
CONFIG_SYS_ETVPE_CLK
Signed-off-by: Tom Rini <trini@konsulko.com>
After more patches code for jumping to _start_cont symbol in flash memory
involved to code with useless mathematical operations. Currently it does:
r3 := CONFIG_SYS_MONITOR_BASE + ABS(_start_cont) - CONFIG_SYS_MONITOR_BASE
jump to r3
Which is equivalent of just:
r3 := ABS(_start_cont)
jump to r3
The purpose of that code is just to jump to _start_code symbol,
independently of program counter. So branch must be done to absolute
address. Trying to write:
ba _start_cont
just cause linker error:
LD u-boot
powerpc-linux-gnuspe-ld.bfd: arch/powerpc/cpu/mpc85xx/start.o: in function `switch_as':
(.bootpg+0x4b8): relocation truncated to fit: R_PPC_ADDR24 against symbol `_start_cont' defined in .text section in arch/powerpc/cpu/mpc85xx/start.o
make: *** [Makefile:1801: u-boot] Error 1
Probably by the fact that absolute address cannot be expressed by 24-bits.
So write the code via mtlr+blr pattern as it was before and load general
purpose register with absolute address of the symbol:
lis r3,_start_cont@h
ori r3,r3,_start_cont@l
mtlr r3
blr
Seems that gcc and gnu ld linker support symbol@h and symbol@l syntax like
number@h and number@l without any problem. And disassembling of compiler
u-boot binary proved that lis+ori instructions are called with numbers
which represent halves of absolute address of _start_cont symbol.
Signed-off-by: Pali Rohár <pali@kernel.org>
DT node pic@40000 is defined explicitly in p2020-post.dtsi file and also
transitionally via include file pq3-mpic.dtsi. Remove duplicate definition
from p2020-post.dtsi.
No change in final DTB file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are
manually increased by 0x1000 due to .bootpg section. This section has size
of 0x1000 bytes and is manually put by linker script before .text section
(and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Due to this fact lot of other config options are manually increased by
0x1000 value to make correct layout. Note that entry point is not on
CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address
CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image).
Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Put .bootpg code directly into .text section and move text base
address to the start of .bootpg code. And finally remove +0x1000 value from
lot of config options. With this removal custom PHDRS is not used anymore,
so remove it too.
After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at
address -0x1000 anymore.
Tested on P2020 board with SPL and proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.
Having a '.' in the section names conflicts with clang's ASAN
instrumentation which tries to add redzones between the linker list
elements, causing expected accesses to fail. However, clang doesn't try
to add redzones to user sections, which are names with all alphanumeric
and underscore characters.
Signed-off-by: Andrew Scull <ascull@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Effective page number mask for MAS2 register is stored in macro MAS2_EPN.
Fixes: 2146cf5682 ("Reworked FSL Book-E TLB macros to be more readable")
Signed-off-by: Pali Rohár <pali@kernel.org>
Header file asm/fsl_law.h already provides correct definition for second
and third PCIe controller (LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3). But
is missing definition for the first PCIe controller (LAW_TRGT_IF_PCIE_1).
Note that existing definition for LAW_TRGT_IF_PCIE_2 and LAW_TRGT_IF_PCIE_3
are slightly complicated, but are really correct for P2020 platform.
Signed-off-by: Pali Rohár <pali@kernel.org>
When CONFIG_WDT is enabled then non-DM watchdog code cannot be used due to
conflicting functions like watchdog_reset(). So disable compilation of
mpc85xx watchdog_reset() function when CONFIG_WDT is enabled.
Signed-off-by: Pali Rohár <pali@kernel.org>
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
board config header files.
Signed-off-by: Tom Rini <trini@konsulko.com>
In the places where PowerPC references CONFIG_SYS_GBL_DATA_OFFSET it
does so as (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET). And
it defines CONFIG_SYS_GBL_DATA_OFFSET in the same manner that other
architectures define CONFIG_SYS_INIT_SP_OFFSET. Other architectures
define CONFIG_SYS_INIT_SP_ADDR as (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_INIT_SP_OFFSET) typically. Rename things within PowerPC for
consistency with other architectures.
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently, since we know that in the combination of
CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET all of the "high"
bits are in CONFIG_SYS_INIT_RAM_ADDR and "low" bits are in
CONFIG_SYS_GBL_DATA_OFFSET we reference this separately in start.S, but
added together everywhere else. For clarity consistency, reference the
combined value here instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_INIT_MINIMAL
CONFIG_SPL_FLUSH_IMAGE
CONFIG_SPL_SKIP_RELOCATE
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit e8c0e0064c ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
fixed SD card booting on mpc85xx boards but broke NOR booting on these
boards. Reason is that U-Boot build system for NOR images uses binman and
this binman ignores alignment defined in linker script. Instead it has own
config file where is alignment defined.
Fix binman alignment for mpc85xx boards to match what is _now_ defined in
linker script.
This change fixes building of U-Boot for NOR booting on P2020 board.
Fixes: e8c0e0064c ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
Signed-off-by: Pali Rohár <pali@kernel.org>
If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Upstream Linux kernel uses for mpc8548-based PCIe controllers compatible
string "fsl,mpc8548-pcie". So change U-Boot fsl PCIe driver and all DTS
files to use "fsl,mpc8548-pcie" instead of "fsl,pcie-mpc8548" to be
compatible with Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linux P2020 USB kernel driver uses compatible string fsl-usb2-dr-v1.6 and
needs more DT properties. Copy P2020 usb@22000 properties from upstream
Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
interrupts property for spi@7000 node is needed for compatibility with
Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Device tree include file p2020-post.dtsi should be included after the board
device tree file and overrides settings of the board. So it should not
disable some node as board cannot enable it via normal way (it has to
enable it after inclusion of p2020-post.dtsi file).
Fix it by removal of explicit disable in p2020-post.dtsi file and then
remove explicit post-post enable in all P2020 board device tree files.
Currently no P2020 board has spi@7000 node disabled.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linux kernel eSDHC driver for P2020 requires additional compatible string
fsl,p2020-esdhc and interrupts property. Add them to p2020-post.dtsi file
to make U-Boot board DTS files compatible for Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-etsec1-timer-0.dtsi device tree include file from upstream Linux
kernel for P2020. This allows U-Boot to use P2020 device tree files from
upstream Linux kernel which reference ptp_clock@24e00 device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-gpio-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference gpio-controller@fc00 device.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It is too confusing if sections are defined in non-ascending order.
Also linker has to go backward and then again forward when generating final
binary.
To make future changes easier, define all linker sections in ascending
order.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Linker knows exact size of the image, so there is no need to use
CONFIG_SYS_MONITOR_LEN macro (which should be upper limit).
Remove usage of CONFIG_SYS_MONITOR_LEN macro to simplify setup.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
.interp section is not available in output ELF binary and SIZEOF_HEADERS is
needed at all.
There is no change in generated u-boot.bin binary.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
mpc85xx SPL NAND linker script u-boot-nand_spl.lds is not used since
Jun 2014 commit 0234446fd1 ("nand_spl: remove MPC8536DS support").
Remove it.
Signed-off-by: Pali Rohár <pali@kernel.org>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Currently CONFIG_OF_SEPARATE is completely broken and U-Boot for some
mpc85xx board (e.g. P2020) has to be compiled with CONFIG_OF_EMBED.
Otherwise it crashes during early init.
When debug console is enabled and all debug logging options are turned on
then U-Boot on P2020 with CONFIG_OF_SEPARATE prints following error:
No valid device tree binary found at 110dc300
initcall sequence 110d3560 failed at call 1109535c (err=-1)
### ERROR ### Please RESET the board ###
Problem is with appended DTB. When CONFIG_SYS_MPC85XX_NO_RESETVEC is set
U-Boot binary image without DTB ends immediately after the .u_boot_list
section. At this position is defined _end symbol at which U-Boot expects
start of the appended DTB.
Problem is that after .u_boot_list section are in linker script defined
another sections with 256 byte long padding which are completely empty.
During conversion of U-Boot ELF binary to RAW binary u-boot-nodtb.bin,
objcopy removes trailing zero padding and therefore DTB is appended at
wrong position.
Changing alignment from 256 bytes to 4 bytes fixes this issue. And appended
DTB is finally at he correct position. With this fix U-Boot on P2020 with
CONFIG_OF_SEPARATE option starts working again.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
For compatibility with Linux kernel DTS files and also with other U-Boot
powerpc DTS files, rename esdhc@2e000 node to sdhc@2e000 in p1020-post.dtsi
and p2020-post.dtsi include files.
Linux kernel DTS files which include these dtsi files, expect that esdhc
node has name sdhc@2e000 and do not work with other node names.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This node is required for NAND and NOR support. Node is taken from the
upstream Linux kernel DTS file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Import pq3-duart-0.dtsi device tree include file from upstream Linux kernel
for P2020. This allows U-Boot to use P2020 device tree files from upstream
Linux kernel which reference serial0 or serial1 devices.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
P2020 DTS files in upstream Linux kernel use fsl/p2020si-pre.dtsi and
fsl/p2020si-post.dtsi include device tree files.
Add symlinks for these include device tree files into U-Boot powerpc
directory and points them to U-Boot inline device tree files p2020.dtsi and
p2020-post.dtsi.
This allows to use P2020 DTS files from upstream Linux kernel in U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The real entry point is _start_e500. There is no _start symbol at all. So
rename _start_e500 to _start for convension that _start symbol is used as
entry point.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
_start symbol contains only 32-bit data number 0x27051956 despite it is
marked as text section. This magic number is IH_MAGIC which is used for
marking uboot image header.
mpc85xx start.S code does not define valid uboot image header, so IH_MAGIC
number in _start symbol is useless there.
Moreover this _start symbol is not used at all. Entry point is at symbol
_start_e500.
So because this _start symbol is not used for anything, completely remove
it with IH_MAGIC number. After _start symbol was _start_cont symbol, so
replace all relative address calculations by _start_cont.
Signed-off-by: Pali Rohár <pali@kernel.org>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
device tree imported from linux kernel.
c500bee1c5b2 (tag: v5.14-rc4) Linux 5.14-rc4
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
As no platforms override this value, set it for all mpc83xx platforms.
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_MONITOR_BASE
Note that for how this is re-used on some PowePC platforms, we introduce
CONFIG_SPL_SYS_MONITOR_BASE and CONFIG_TPL_SYS_MONITOR_BASE and use the
CONFIG_VAL macro to get the correct value at build time, in the code.
Signed-off-by: Tom Rini <trini@konsulko.com>
