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Convert CONFIG_SYS_RAMBOOT to Kconfig

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This converts the following to Kconfig:
   CONFIG_SYS_RAMBOOT

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-06-25 11:02:44 -04:00
parent 3dab405b45
commit 5a4461867c
14 changed files with 5 additions and 52 deletions
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1
arch/powerpc/cpu/mpc85xx/Kconfig
View file

@ -109,6 +109,7 @@ config TARGET_QEMU_PPCE500
bool "Support qemu-ppce500"
select ARCH_QEMU_E500
select PHYS_64BIT
select SYS_RAMBOOT
imply OF_HAS_PRIOR_STAGE
config TARGET_T1024RDB

4
boot/Kconfig
View file

@ -555,8 +555,12 @@ config CHROMEOS_VBOOT
distinguishing between booting Chrome OS in a basic way (developer
mode) and a full boot.
config SYS_RAMBOOT
bool
config RAMBOOT_PBL
bool "Freescale PBL(pre-boot loader) image format support"
select SYS_RAMBOOT if PPC
help
Some SoCs use PBL to load RCW and/or pre-initialization instructions.
For more details refer to doc/README.pblimage

6
include/configs/MPC837XERDB.h
View file

@ -126,12 +126,6 @@
* The reserved memory
*/
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#else
#undef CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
/*

6
include/configs/P1010RDB.h
View file

@ -342,12 +342,6 @@ extern unsigned long get_sdram_size(void);
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS3_FTIM3 0x0
#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
#define CONFIG_SYS_RAMBOOT
#else
#undef CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */

4
include/configs/P2041RDB.h
View file

@ -129,10 +129,6 @@
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (ms) */
#if defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_SYS_RAMBOOT
#endif
/* Nand Flash */
#ifdef CONFIG_NAND_FSL_ELBC
#define CONFIG_SYS_NAND_BASE 0xffa00000

4
include/configs/T102xRDB.h
View file

@ -287,10 +287,6 @@
#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
#endif
#if defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_HWCONFIG
/* define to use L1 as initial stack */

4
include/configs/T104xRDB.h
View file

@ -259,10 +259,6 @@
#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
#endif
#if defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_HWCONFIG
/* define to use L1 as initial stack */

4
include/configs/T208xQDS.h
View file

@ -267,10 +267,6 @@
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
#endif
#if defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_HWCONFIG
/* define to use L1 as initial stack */

4
include/configs/T208xRDB.h
View file

@ -226,10 +226,6 @@
#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
#endif
#if defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_HWCONFIG
/* define to use L1 as initial stack */

4
include/configs/T4240RDB.h
View file

@ -321,10 +321,6 @@
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS3_FTIM3 0x0
#if defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_SYS_RAMBOOT
#endif
/* I2C */
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */
#define I2C_MUX_PCA_ADDR_SEC 0x76 /* I2C bus multiplexer,secondary */

4
include/configs/corenet_ds.h
View file

@ -119,10 +119,6 @@
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
#if defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_SYS_RAMBOOT
#endif
/* Nand Flash */
#ifdef CONFIG_NAND_FSL_ELBC
#define CONFIG_SYS_NAND_BASE 0xffa00000

8
include/configs/km/km-mpc83xx.h
View file

@ -25,10 +25,6 @@
*/
#define CONFIG_SYS_FLASH_BASE 0xF0000000
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT
#endif
/* Reserve 768 kB for Mon */
#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
@ -81,10 +77,6 @@
* Environment
*/
#ifndef CONFIG_SYS_RAMBOOT
/* Address and size of Redundant Environment Sector */
#endif /* CFG_SYS_RAMBOOT */
/*
* Environment Configuration
*/

2
include/configs/p1_p2_rdb_pc.h
View file

@ -414,8 +414,6 @@
#ifdef CONFIG_TPL_BUILD
#define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
#endif
#elif defined(CONFIG_SYS_RAMBOOT)
#define SPL_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
#endif
#define CONFIG_LOADS_ECHO /* echo on for serial download */

2
include/configs/qemu-ppce500.h
View file

@ -9,8 +9,6 @@
#ifndef __QEMU_PPCE500_H
#define __QEMU_PPCE500_H
#define CONFIG_SYS_RAMBOOT
/* Needed to fill the ccsrbar pointer */
/* Virtual address to CCSRBAR */