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90556 commits

Author SHA1 Message Date
Fabio Estevam
e0dfb34173 imx8mp_evk: Select CONFIG_NET_RANDOM_ETHADDR
On an early revision of the imx8mp-evk that I have access to,
the MAC addresses fuses are not programmed, causing failure to bring
the Ethernet interfaces.

Fix this problema by selecting CONFIG_NET_RANDOM_ETHADDR so that
random MAC addresses are assigned and the Ethernet ports become
functional out of the box.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-12-12 16:33:57 -05:00
Andrejs Cainikovs
32c9dfcc56 apalis-imx8: add USBH_EN gpio hog
USB host interface is not working on some Apalis Toradex carrier
boards with Apalis iMX8 SoM. This is due to USBH_EN pin, which
powers USB peripherals, having a strong pull-down on some boards,
and a weak pull-down on the others. This USBH_EN pin is left
unconfigured, which means it is in its default state at cold boot:
input with a strong pull-up. As a result, carrier boards with a
weak pull-down have this signal high enough to trigger power
delivery to USB peripherals, and opposite - boards with strong
pull-down on USBH_EN have this signal below the threshold needed
to trigger USB power delivery.
This change configures the USBH_EN pin as gpio hog, fixing this
issue for all Apalis carrier boards regardless of pull-down
resistor value.

Also, update apalis-imx8_defconfig via savedefconfig.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-12 16:33:53 -05:00
Tim Harvey
ad3a4f91e7 board: gateworks: venice: add fixup for GW73xx-F+
GW73xx-F board revision switched back to the original PCIe switch due to
part availability.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-12 09:21:48 -03:00
Hugo Villeneuve
3d91bc90de arm: dts: imx8mn-var-som: Fix broken EEPROM read
On branch WIP/17Oct2023, the EEPROM can no longer be read:

    U-Boot 2023.10-latest (Oct 17 2023 - 15:53:43 -0400)
    CPU:   Freescale i.MX8MNano Quad rev1.0 at 1200 MHz
    Reset cause: POR
    Model: Variscite VAR-SOM-MX8MN Symphony evaluation board
    var_read_som_eeprom: uclass_get_device_by_of_offset() failed: -19
    initcall failed at call 000000004022207c (err=-19)

Convert EEPROM-related properties to bootph-all so that the EEPROM can
also be read outside of SPL.

Fixes: 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-12 09:21:20 -03:00
Marek Vasut
be4a5f7c35 test: bdinfo: Handle systems without getopt
Systems without getopt support fall back to plain full bdinfo print,
handle such a case, which occurs e.g. with sandbox_flattree_defconfig .

Fixes: 8827a38714 ("test: bdinfo: Test bdinfo -h")
Fixes: 2696f3ab81 ("test: bdinfo: Test bdinfo -m")
Fixes: 3ff2d796a6 ("test: bdinfo: Test bdinfo -e")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-10 10:08:30 -05:00
Tom Rini
3a2b6ba5cf test/py: Disable error E0611 in two cases for pylint
Recently pylint has started to complain about:
No name 'fs_helper' in module 'tests' (no-name-in-module)

Due to:
from tests import fs_helper

However, we have:
test/py/tests/fs_helper.py

And since we do not want to add a dummy test/py/tests/__init__.py to
silence this warning we instead just disable it as needed.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-12-09 15:59:13 -05:00
Tom Rini
65eed68772 test/py: Disable error E0611 in two cases for pylint
Recently pylint has started to complain about:
No name 'fs_helper' in module 'tests' (no-name-in-module)

Due to:
from tests import fs_helper

However, we have:
test/py/tests/fs_helper.py

And since we do not want to add a dummy test/py/tests/__init__.py to
silence this warning we instead just disable it as needed.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-12-09 14:58:21 -05:00
Tom Rini
8737914336 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- StarFive: Add StarFive watchdog driver
- VisionFive2: Support device tree overlay for VisionFive2 board
- Andes: Fix PLIC-SW setting
- RISC-V: Fix NVMe support by implying NVME_PCI for QEMU
- RISC-V: Fix binman for 64 bit format load address
2023-12-09 14:35:44 -05:00
Tom Rini
dd29208815 Merge patch series "bootflow: bootmeth_efi: Fix network efi boot."
To quote the author:

Currently bootmeth_efi crashes while doing a network (dhcp) boot.
This patch series fixes issues and both network and disk boot works.

# Do not modify or remove the line above.
# Everything below it will be ignored.
#
# Please enter a commit message to explain why this merge is necessary,
# especially if it merges an updated upstream into a topic branch.
#
# An empty message aborts the commit.
2023-12-09 13:16:14 -05:00
Shantur Rathore
37503b0c0c bootflow: bootmeth_efi: don't free buffer
bootmeth_efi doesn't allocate any buffer to load efi in any case.
enable static buffer flag for all cases.

Reviewed-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Shantur Rathore <i@shantur.com>
2023-12-09 13:16:08 -05:00
Shantur Rathore
184fc0379d bootflow: bootmeth_efi: Handle fdt not available.
While booting with efi, if fdt isn't available externally,
just use the built-in one.

Reviewed-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Shantur Rathore <i@shantur.com>
2023-12-09 13:16:08 -05:00
Shantur Rathore
e31317e161 bootflow: bootmeth_efi: set bflow->fname from bootfile name
We need to set boot->fname before calling efi_set_bootdev
otherwise this crashes as bflow->fname is null.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shantur Rathore <i@shantur.com>
2023-12-09 13:16:08 -05:00
Shantur Rathore
c5440a6ae8 bootflow: bootmeth_efi: Set bootp_arch as hex
bootmeth_efi sets up bootp_arch which is read later in bootp.c
Currently bootp_arch is being set as integer string and being
read in bootp.c as hex, this sends incorrect arch value to dhcp server
which in return sends wrong file for network boot.

For ARM64 UEFI Arch value is 0xb (11), here we set environment as 11
and later is read as 0x11 and 17 is sent to dhcp server.

Setting it as hex string fixes the problem.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shantur Rathore <i@shantur.com>
2023-12-09 13:16:08 -05:00
Janne Grunau
6bfd07bf64 arm: apple: t602x: Add missing MMIO regions to memmap
The memory maps for Apple's M2 Pro/Max/Ultra left MMIO space out which
was not used by any driver at the time. The display out exposed as
simple-framebuffer use a power-domain controlled by a device in an
unmapped region.
Add a map covering this region as well as another MMIO region in the
range 0x4'0000'0000 - 0x5'0000'0000. The added regions cover all MMIO
annotated in Apple's device tree in this range.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Eric Curtin <ecurtin@redhat.com>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2023-12-09 09:17:20 -05:00
Tom Rini
e54987d6af Merge patch series "cmd: bdinfo: Optionally use getopt and implement bdinfo -a"
Clean up our bdinfo command a bit and introduce "bdinfo -a"
2023-12-09 08:42:49 -05:00
Marek Vasut
3ff2d796a6 test: bdinfo: Test bdinfo -e
The bdinfo -e should print only the board ethernet settings.
Test the expected output.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-09 08:42:29 -05:00
Marek Vasut
2696f3ab81 test: bdinfo: Test bdinfo -m
The bdinfo -m should print only the board memory layout.
Test the expected output.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-09 08:42:29 -05:00
Marek Vasut
8827a38714 test: bdinfo: Test bdinfo -h
The bdinfo -h should print error message that -h is an unknown
parameter and then command help text. Test the expected output.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-09 08:42:29 -05:00
Marek Vasut
4823b05f01 test: bdinfo: Test both bdinfo and bdinfo -a
Factor out the core of test for all bdinfo output into bdinfo_test_all()
and then reuse it to verify that both 'bdinfo' and 'bdinfo -a' print all
the bdinfo output.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-09 08:42:29 -05:00
Marek Vasut
5bd32a96ad test: bdinfo: Rename bdinfo_test_move() to bdinfo_test_full()
Rename bdinfo_test_move() to bdinfo_test_full(). The former is a
remnant of deriving this test from another test. No functional
change.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-09 08:42:29 -05:00
Marek Vasut
3e4225aa91 configs: sandbox: Enable GETOPT for sandbox and sandbox64 target
Enable GETOPT so that 'bdinfo' command with getopt() support can be
tested in CI.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-09 08:42:29 -05:00
Marek Vasut
ea9637c92f cmd: bdinfo: Implement support for printing ethernet settings via bdinfo -e
Add support for printing ethernet settings only via 'bdinfo -e' .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-09 08:42:29 -05:00
Marek Vasut
f1774a8030 cmd: bdinfo: Implement support for printing memory layout via bdinfo -m
Add support for printing memory layout only via 'bdinfo -m' .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-09 08:42:29 -05:00
Marek Vasut
b6a90ac090 cmd: bdinfo: Optionally use getopt and implement bdinfo -a
Add optional support for getopt() and in case this is enabled via
GETOPT configuration option, implement support for 'bdinfo -a'.
The 'bdinfo -a' behaves exactly like bdinfo and prints 'all' the
bdinfo information. This is implemented in preparation for other
more fine-grained options.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-12-09 08:42:29 -05:00
Jim Liu
b2906f5b61 mtd: spi-nor: add flash model w25q01/02 support
add flash w25q01jv, w25q01jvfim and w25q02jv support

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:44:24 +05:30
Udit Kumar
c77efca283 spi: cadence_qspi: Select flash subnode at runtime
Currently spi driver gets flash parameter from first subnode.

Few boards have more than one flash with different parameters
and selection of flash is done by on board switch settings.
In such case, uboot needs to be recompiled with updated
device tree to align with board switch settings.

This patch allows to select flash node at runtime.

Boards those are supporting multiple flashes
needs to implement cadence_qspi_get_subnode function and return correct
flash node.

Cc: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:43:00 +05:30
Godfrey Mwangi
a08f7de39d mtd: spi-nor: Add MT25QU128AB params
Add Micron MT25QU128AB flash.

Signed-off-by: Godfrey Mwangi <godmwan@microsoft.com>
[jagan: fix the commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:40:48 +05:30
Jit Loon Lim
bf41cb3d30 mtd: spi-nor: Add MT25U01G part number for SPI NOR Flash
MT25QU01 OPN with 4B OPCODE support is currently not supported in
source code and the driver reuses the definition for "n25q00a"
which has the same silicon ID but is a slower part.

Adding mt25u01g definition to the source code to support a faster
read response for MT25QU01 QSPI NOR Flash device.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
[jagan: fix the id position and commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:39:03 +05:30
Teik Heng Chong
77f3b5e4ad drivers: mtd: spi: Add support for GD55LB02GEBIR SPI NOR flash
Add Support for GigaDevice GD55LB02GEBIR SPI NOR flash as QSPI
configuration flash

Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:36:16 +05:30
Tom Rini
cbf048f2b3 - Add missing DM_USB_GADGET to amlogic boards
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Merge tag 'u-boot-amlogic-20231207' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Add missing DM_USB_GADGET to amlogic boards
2023-12-08 22:00:24 -05:00
Tom Rini
e9742cb67f Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
The first four patches are actual fixes. The last three patches add
support for the apparently popular OrangePi Zero 3 board: multiple
people seem to be champing at the bit, so I'd rather give them
something real instead of people using random trees they found on the
Internet. It's actually mostly the new defconfig file anyway, so the
chances for regressions are very slim.
2023-12-08 22:00:01 -05:00
Tom Rini
dd638467a4 Pull request efi-2024-01-rc5
Documentation:
 
 * Update and correct support notes on clang
 * sandbox: Fix VPL instructions
 
 UEFI:
 
 * Fix a bug in DisconnectController
 * Provide better error messages for missing CONFIG_EFI_CAPSULE_ESL_FILE
 * Create EFI memory reservations when booting via ACPI
 * Make ACPI tables accessible in EFI app
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Merge tag 'efi-2024-01-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2024-01-rc5

Documentation:

* Update and correct support notes on clang
* sandbox: Fix VPL instructions

UEFI:

* Fix a bug in DisconnectController
* Provide better error messages for missing CONFIG_EFI_CAPSULE_ESL_FILE
* Create EFI memory reservations when booting via ACPI
* Make ACPI tables accessible in EFI app
2023-12-08 19:03:03 -05:00
Neil Armstrong
4005729c0d configs: meson: enable missing DM_USB_GADGET
Since commit b96640cbfb ("ARM: meson: g12a: switch dwc2 otg to DM")
and commit e327e2affd ("ARM: meson: switch AXG & GX dwc2 otg to DM")
Amlogic boards now requires DM_USB_GADGET to have USB Gadget to work.

Add it to the boards configs as returned by:
$ grep -L DM_USB_GADGET $(grep -l CONFIG_USB_GADGET $(grep -l MESON configs/*))

Fixes: b96640cbfb ("ARM: meson: g12a: switch dwc2 otg to DM")
Fixes: e327e2affd ("ARM: meson: switch AXG & GX dwc2 otg to DM")
Link: https://lore.kernel.org/r/20231206-u-boot-m2s-fix-usb-gadget-v1-1-1c4c66cd10f3@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-12-07 09:36:19 +01:00
Andre Przywara
d2e1cc69a2 sunxi: H616: Add OrangePi Zero 3 board support
The OrangePi Zero 3 is a small development board featuring the Allwinner
H618 SoC, shipping with up to 4GB of DRAM, Gigabit Ethernet, a micro-HDMI
connector and two USB sockets.
The board uses LPDDR4 DRAM and an X-Powers AXP313a PMIC, support for
which was recently added to U-Boot.

Add a defconfig file selecting the right drivers and DRAM options.
Since the .dts file was synced from the Linux kernel repo already, we
just need to add one line to the Makefile to actually build the .dtb.

The DRAM parameters were derived from the values found in the BSP DRAM
drivers on the SPI NOR flash.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Tested-by: Bob McChesney <bob@electricworry.net>
Tested-by: Stephen Graf <stephen.graf@gmail.com>
2023-12-06 23:09:17 +00:00
Andre Przywara
929f198d07 sunxi: H616: remove default AXP305 selection
The original H616 devices released about three years ago were typically
paired with an X-Powers AXP305 PMIC. Newer devices uses the smaller
AXP313, and there seem to be far more systems with this PMIC around now.

Remove the default AXP305 selection for the H616 SoC from the Kconfig,
and move the PMIC selection into the board defconfig files instead.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-12-06 23:09:17 +00:00
Andre Przywara
9ac57fb3a2 mtd: spi-nor: Add support for zBIT ZB25VQ128
Add support for the zBIT ZB25VQ128 (128M-bit) SPI NOR flash memory chip,
as used on the Xunlong Orange Pi Zero 3 board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2023-12-06 23:09:01 +00:00
Chukun Pan
4bf34135fe sunxi: dts: arm64: update emac for Orange Pi Zero 3
The current emac setting is not suitable for Orange Pi Zero 3,
move it back to Orange Pi Zero 2 DT. Also update phy mode and
delay values for emac on Orange Pi Zero 3.
With these changes, Ethernet now looks stable.

Fixes: 95c3b0635e ("sunxi: dts: arm64: update devicetree files from Linux-v6.6-rc6")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-12-06 23:08:37 +00:00
Stephen Graf
21b8051939 sunxi: correct documentation for SPI flashing
The mtd_debug write does not work in this context. The flashcp command does
work, provides both the erase and write functions and with the verbose
option gives good feedback.

Signed-off-by: Stephen Graf <stephen.graf@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-12-06 23:08:37 +00:00
Andre Przywara
0d8ac5644e sunxi: h616: (really) lower SPL stack address to avoid BROM data
When using the USB OTG FEL mode on the Allwinner H616, the BootROM
stores some data at the end of SRAM C. This is also the location where
we place the initial SPL stack, so it will overwrite this data.
We still need the BROM code after running the SPL, so should leave that
area alone.
Interestingly this does not seem to have an adverse effect, I guess on
the "way out" (when we return to FEL after the SPL has run), this data
is not needed by the BROM, for just the trailing end of the USB operation.
However this is still wrong, and we should not clobber BROM data.

Lower the SPL stack address to be situated right below the swap buffers
we use in sunxi-fel: that should be out of the way of everyone else.

This obsoletes a previous commit (eb53e7743c) with the same name:
that one was changing the address in an *unused* macro in sunxi_common.h,
so the previous patch didn't have any effect at all.

Fixes: eb53e7743c ("sunxi: h616: lower SPL stack address to avoid BROM data")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-12-06 23:08:37 +00:00
Andre Przywara
cb3e29805c sunxi: H616: OrangePi Zero 2: enable USB power supply
The OrangePi Zero 2 has a USB VBUS regulator, controlled by pin PC16.
This is correctly described in the DT, but the patches for supporting
this are still pending.

Meanwhile add our good old CONFIG_USB1_VBUS_PIN to the defconfig file,
to enable power on the USB port and allow using a USB flash drive, for
instance.

Fixes: 6acc5fa581 ("sunxi: H616: enable USB support for H616 boards")
Reported-by: Mikhail Kalashnikov <iuncuim@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-12-06 23:08:37 +00:00
Jonas Karlman
791e2bf9a8 mtd: spi-nor: Add support for Silicon Kaiser sk25lp128
Add support for Silicon Kaiser sk25lp128 SPI NOR flash found in Pine64
PinePhone Pro and PineTab2.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-12-06 18:04:46 +05:30
William Zhang
672c97b646 spi: bcm63xx-hsspi: Fix compiler warning
When build for arm64 target, comipler reports the following warning:
drivers/spi/bcm63xx_hsspi.c: In function ‘bcm63xx_hsspi_xfer_dummy_cs’:
include/linux/kernel.h:184:17: warning: comparison of distinct pointer
types lacks a cast
  184 |  (void) (&_min1 == &_min2);  \
      |                 ^~
drivers/spi/bcm63xx_hsspi.c:298:22: note: in expansion of macro ‘min’
  298 |   size_t curr_step = min(step_size, data_bytes);

This change fix this warning by casting the data_bytes to size_t.

Fixes: 0e144ec38c ("spi: bcm63xx-hsspi: Add prepend mode support")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
2023-12-06 18:00:50 +05:30
John Clark
94533cd9c1 starfive: visionfive2: add device tree overlay support
device tree overlay support requires fdtoverlay_addr_r to be set

before
~~~~~~
Invalid fdtoverlay_addr_r for loading overlays

after
~~~~~
Retrieving file: /boot/overlay/rtc-ds3231.dtbo

Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-06 16:05:39 +08:00
Randolph
866dcd88a0 riscv: binman: fix the load field format
Using /bits/ 64 prefix for 64 bits address

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-06 16:05:39 +08:00
Yu Chien Peter Lin
d1b24a6140 riscv: andes: Fix enable register settings of PLICSW
On 32-core platform, hart31 gets stuck at secondary_hart_loop
as the corresponding enable bit is not set in enable_ipi().
We should program the next word (0x2f84) which is assigned
as the enable register of hart31. It should be done in the same
way when we invoke riscv_send_ipi() to trigger software interrupt
on hart31.

The following diagram shows the enable bits of the fixed PLICSW
scheme.

   Pending regs: 0x1000  x---0---0---0---0------0---0
Pending hart ID:             0   1   2   3 ... 30  31
   Interrupt ID:         0   1   2   3   4 ... 31  32
                         |   |   |   |   |      |   |
    Enable regs: 0x2000  x---1---0---0---0-...--0---0---> hart0
                         |   |   |   |   |      |   |
                 0x2080  x---0---1---0---0-...--0---0---> hart1
                         |   |   |   |   |      |   |
                 0x2100  x---0---0---1---0-...--0---0---> hart2
                         |   |   |   |   |      |   |
                 0x2180  x---0---0---0---1-...--0---0---> hart3
                         .   .   .   .   .      .   .
                         .   .   .   .   .      .   .
                         .   .   .   .   .      .   .
                 0x2f00  x---0---0---0---0-...--1---0---> hart30
                         |   |   |   |   |      |   |
                 0x2f80  x---0---0---0---0-...--0---1---> hart31
                         <-------- word 0 -------><--- word 1 --->

This patch includes some cleanups to macros/functions.

Fixes: ebf11273220a ("riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy")
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Randolph <randolph@andestech.com>
2023-12-06 16:05:39 +08:00
Heinrich Schuchardt
3980baa411 risc-v: qemu: imply NVME_PCI
CONFIG_NVME=y without CONFIG_NVME_PCI=y does not provide working NVMe
support. Instead of implying CONFIG_NVME we must imply CONFIG_NVME_PCI
which will select CONFIG_NVME.

Fixes: e64db0d92e ("riscv: qemu: Enable e1000 and nvme support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2023-12-06 16:05:39 +08:00
Chanho Park
21ea9a9dd7 configs: visionfive2: Enable watchdog driver
Enables StarFive Watchdog driver and WDT command.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Chanho Park
a31622cd64 riscv: dts: jh7110: Add watchdog device tree node
Adds jh7110 watchdog device tree node.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Chanho Park
da26455098 watchdog: Add StarFive Watchdog driver
Add to support StarFive watchdog driver. The driver is imported from
linux kernel's drivers/watchdog/starfive-wdt.c without jh7100 support
because there is no support of jh7100 SoC in u-boot yet.
Howver, this patch has been kept the variant coding style because JH7100
can be added later and have a consistency with the linux driver.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Chanho Park
8ef2d7926f clk: starfive: jh7110: Add watchdog clocks
Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110
watchdog device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00