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arm: dts: imx8mn-var-som: Fix broken EEPROM read

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On branch WIP/17Oct2023, the EEPROM can no longer be read:

    U-Boot 2023.10-latest (Oct 17 2023 - 15:53:43 -0400)
    CPU:   Freescale i.MX8MNano Quad rev1.0 at 1200 MHz
    Reset cause: POR
    Model: Variscite VAR-SOM-MX8MN Symphony evaluation board
    var_read_som_eeprom: uclass_get_device_by_of_offset() failed: -19
    initcall failed at call 000000004022207c (err=-19)

Convert EEPROM-related properties to bootph-all so that the EEPROM can
also be read outside of SPL.

Fixes: 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
This commit is contained in:
Hugo Villeneuve 2023-10-17 16:58:15 -04:00 committed by Fabio Estevam
parent 65eed68772
commit 3d91bc90de
1 changed files with 3 additions and 3 deletions
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6
arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
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@ -39,11 +39,11 @@
};
&i2c1 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_i2c1 {
bootph-pre-ram;
bootph-all;
};
&pinctrl_pmic {
@ -83,5 +83,5 @@
};
&eeprom_som {
bootph-pre-ram;
bootph-all;
};