Commit graph

16177 commits

Author SHA1 Message Date
Tianling Shen
6a73211d4b rockchip: rk3568: Add support for FriendlyARM NanoPi R5C
FriendlyARM NanoPi R5C is an open-sourced mini IoT gateway device.

Specification:
- Rockchip RK3568
- 1/4GB LPDDR4X RAM
- 8/32GB eMMC
- SD card slot
- M.2 Connector
- 2x USB 3.0 Port
- 2x 2500 Base-T (PCIe, r8125)
- HDMI 2.0
- MIPI DSI/CSI
- USB Type C 5V

The device tree is taken from kernel v6.4-rc1.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
2023-07-28 18:45:02 +08:00
Tianling Shen
0ef326b5e9 rockchip: rk3568: Add support for FriendlyARM NanoPi R5S
FriendlyARM NanoPi R5S is an open-sourced mini IoT gateway device.

Board Specifications
- Rockchip RK3568
- 2 or 4GB LPDDR4X
- 8GB or 16GB eMMC, SD card slot
- GbE LAN (Native)
- 2x 2.5G LAN (PCIe)
- M.2 Connector
- HDMI 2.0, MIPI DSI/CSI
- 2xUSB 3.0 Host
- USB Type C PD, 5V/9V/12V
- GPIO: 12-pin 0.5mm FPC connector

The device tree is taken from kernel v6.4-rc1.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
2023-07-28 18:45:02 +08:00
Tianling Shen
9bd954ab8a rockchip: rk3328: Add support for Orange Pi R1 Plus LTS
The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and RAM type
changed from DDR4 to LPDDR3.

The device tree is taken from kernel v6.4-rc1.

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Tianling Shen
69e16c7b1c rockchip: rk3328: Add support for Orange Pi R1 Plus
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.

This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.

The device tree and description are taken from kernel v6.3-rc1.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
2023-07-28 18:45:02 +08:00
Chris Morgan
ff27afedff board: rockchip: Add panel auto-detection for Anbernic RGxx3
Add support to automatically detect the panel for the Anbernic RGxx3.
This is done by creating a "pseudo driver" that provides only the bare
minimum to start the DSI controller and DSI DPHY. Once started, we then
can query the panel for its panel ID and compare it to a table of known
values. The panel compatible string (which corresponds to the upstream
Linux driver) is then defined as an environment variable "panel". The
panel compatible string is also changed automatically via an
ft_board_setup() call if what is detected differs from what is in the
loaded tree. This way, end users can use the same bootloader without
having to worry about which panel they have (as there is no obvious
way of knowing).

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Chris Morgan
b190381418 board: rockchip: Add support for RG353PS to RGxx3
Add support for the RG353PS to the Anbernic RGxx3. This device is a
slightly pared down version of the RG353P with no eMMC, no touchscreen,
and only 1GB of RAM.

Refactor board logic so that all supported devices are defined with
ADC values and that future boards can be added by just defining the
board values in the device array.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Chris Morgan
3c057b4c6c rockchip: board: Update Odroid Go2 to Support Additional Revisions
Update the board.c file for the Odroid Go Advance to support the
Black Edition and the Odroid Go Super. The Odroid Go Advance Black
Edition differs from the original model with the addition of 2
extra buttons and an ESP8266 WiFi module. The Odroid Go Super
adds an additional 2 buttons compared to the Black Edition, along
with a larger panel and larger battery.

This change uses the value of ADC0 to determine which of these
3 models it is, and then changes the ${fdtfile} environment variable
to match the proper devicetree name in mainline Linux.

Tested on an Odroid Go Advance (first revision) and an Odroid Go Super.
The correct ${fdtfile} variable was set for each device.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-07-28 18:45:02 +08:00
Angelo Dureghello
74c521912a board: m68k add missing maintainer
Add myself as a maintainer for orphaned boards.
All these boards are covered by buildman m68k test.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-07-25 23:21:42 +02:00
Andrew Davis
fa59771039 MAINTAINERS: Take maintainership of TI KeyStone2 support
Add arch/arm/mach-keystone/ into K2 board directory MAINTAINERS file.

Convert current entries into regex match style.

Assign maintainership to myself.

Signed-off-by: Andrew Davis <afd@ti.com>
2023-07-25 13:29:00 -04:00
Tom Rini
fdfbd70da6 MAINTAINERS: Add some missing directories or files
In a few cases we have MAINTAINERS entries that are missing obvious
paths or files. Typically this means a board directory that did not list
itself, but in a few cases we have a Kconfig file or similar.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
b99476e71a MAINTAINERS: Deal with '+' in paths
The listed paths are allowed to contain wildcards.  This includes the
'+' character which we have as a literal part of the path in a few
cases. Escape the '+' here so that files are matched.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
5f1720f282 MAINTAINERS: Fix path typos and similar
We have a number of cases where the in-tree path of files and where
they presumably were when the first version of a patch were posted
differ slightly.  Correct these to point at where the files are now.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
f23f1b5307 MAINTAINERS: Add a number of "common" directories
A number of platforms have "common" directories that are in turn not
listed by the board MAINTAINERS file.  Add these directories in many
cases.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
bded724104 xes: Remove leftover code
The platforms here have been removed, but the common code directory was
forgotten.  Clean up.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
4835e86cba arm: Remove leftover MAINTAINERS files
These platforms have been removed, but the MAINTAINERS file was missed,
clean up.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
1f2e4027fa arm: Remove more remnants of bcmcygnus
Remove some leftover files from the bcmcygnus platform.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
d38ed5b68c sunxi: Add MAINTAINERS entry for Lctech Pi F1C200s
This defconfig was added without a MAINTAINERS entry, add one.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
2b506407c8 rockchip: Add MAINTAINERS entry for Radxa Rock 4C+
This defconfig was added without a MAINTAINERS entry, add one.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
e5478bef26 MAINTAINERS: Add some missing defconfig files to existing entries
We have a few places where defconfigs were added (or renamed) and not
included in their previously listed MAINTAINERS entry, correct this.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by:  Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Tom Rini
aaf929a55f MAINTAINERS: Correct minor mistakes on some file listings
There are a few entries where minor mistakes mean that we don't match up
with obviously expected files, correct those.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-07-25 12:44:47 -04:00
Manorit Chawdhry
d5b1ef30d7 board: ti: keys: add .key and .crt for fit signature signing
Fit signature mechanism through the standards require the presence of
.key and .crt in the folder with the same name, since we are using our
custMpk only for the signing, update the format to that of standards to
be compatible for packaging easily.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 22:07:46 -04:00
Andrew Davis
014e013e78 environment: ti: Make get_fdt_mmc common
Since get_fdt_mmc is common, factor it out into mmc.env and remove
it from each platform env file along with changing the directory path to
reflect the standards. Use it in mmcloados but keep loadfdt
defined in case it is still used by some external uEnv.txt script.

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-07-21 20:35:50 -04:00
Andrew Davis
d8ea68da6b environment: ti: Prefix ARM64 DTB names with directory
In Linux the ARM64 DTSs are stored in vendor directories to help organize
the files and prevent naming collisions. The deployed DTBs will mirror
this and so the vendor prefix should be added to the variable used to
locate these files.

Suggested-by: Ryan Eatmon <reatmon@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-21 20:35:50 -04:00
Kamlesh Gurudasani
40e09b6afb board: ti: am64x: am64x.env: set fdtfile env variable
Set fdtfile env variable similar to other k3 socs.

Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-21 19:37:57 -04:00
Neha Malcom Francis
1ee652ab2f doc: board: ti: Update documentation for binman flow
Earlier documentation specified builds for generating bootloader images
using an external TI repository k3-image-gen and core-secdev-k3. Modify
this to using the binman flow so that user understands how to build the
final boot images.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
6d6228ab8f am62a: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
Support added for HS-SE, HS-FS and GP boot binaries for AM62ax.

HS-SE:
    * tiboot3-am62ax-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-am62ax-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-am62ax-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

It is to be noted that the bootflow followed by AM62ax requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
01e0127753 am62a: yaml: Add board configs for AM62ax
Added YAML configs for AM62ax

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
ce46f51990 am625: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
Support added for HS-SE, HS-FS and GP boot binaries for AM62.

HS-SE:
    * tiboot3-am62x-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-am62x-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-am62x-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

It is to be noted that the bootflow followed by AM62 requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:59 -04:00
Neha Malcom Francis
0eba798b41 am62: yaml: Add board configs for AM62
Added YAML configs for AM62

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
106589aae7 j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
Support has been added for both HS-SE, HS-FS  and GP images.

HS-SE:
    * tiboot3-j721s2-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-j721s2-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-j721s2-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

It is to be noted that the bootflow followed by J721S2 requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
267a4845c9 j721s2: yaml: Add board configs for J721S2
Added YAML configs for J721S2

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
1bc527e8f4 am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img
Support added for HS and GP boot binaries for AM64x.

HS-SE:
    * tiboot3-am64x_sr2-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-am64x_sr2-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-am64x-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

Note that the bootflow followed by AM64x requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* sysfw
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* ATF
	* OP-TEE
	* A53 SPL
	* A53 SPL dtbs

u-boot.img:
	* A53 U-Boot
	* A53 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
640bf9dd8e am64x: yaml: Add board configs for AM64x
Added YAML configs for AM64xx

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
77c29cb1b6 am65: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img
Support has been added for both HS-SE(SR 2.0) and GP(SR 2.0) images.

HS-SE:
	* tiboot3-am65x_sr2-hs-evm.bin
	* sysfw-am65x_sr2-hs-evm.itb
	* tispl.bin
	* u-boot.img

GP:
	* tiboot3.bin --> tiboot3-am65x_sr2-gp-evm.bin
	* sysfw.itb --> sysfw-am65x_sr2-gp-evm.itb
	* tispl.bin_unsigned
	* u-boot.img_unsigned

Note that the bootflow followed by AM65x requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
sysfw.itb:
	* sysfw
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* ATF
	* OP-TEE
	* A53 SPL
	* A53 SPL dtbs

u-boot.img:
	* A53 U-Boot
	* A53 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
27ebb1517f am65x: yaml: Add AM65x board config files
Added YAML configs for AM65x

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
ca5f1e25e5 j7200: dts: binman: Package tiboot3.bin, tispl.bin, u-boot.img
Support has been added for both HS-SE(SR 2.0), HS-FS(SR 2.0) and GP
images.

HS-SE:
	* tiboot3-j7200_sr2-hs-evm.bin
	* tispl.bin
	* u-boot.img

HS-FS:
	* tiboot3-j7200_sr2-hs-fs-evm.bin
	* tispl.bin
	* u-boot.img

GP:
	* tiboot3.bin --> tiboot3-j7200-gp-evm.bin
	* tispl.bin_unsigned
	* u-boot.img_unsigned

It is to be noted that the bootflow followed by J7200 requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
e6135b0614 j7200: yaml: Add J7200 board config files
Added YAML configs for J7200

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
177178685a j721e: dts: binman: Package tiboot3.bin, sysfw.itb, tispl.bin, u-boot.img
By providing entries in the binman node of the device tree, binman will
be able to find and package board config artifacts generated by
TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.
It will also pick out the R5 SPL and sign it with the help of TI signing
entry and generate the final tiboot3.bin.

Entries for A72 build have been added to k3-j721e-binman.dtsi to
generate tispl.bin and u-boot.img.

Support has been added for both HS-SE(SR 1.1), HS-FS(SR 2.0) and GP images
In HS-SE, the encrypted system firmware binary must be signed along with
the signed certificate binary.

HS-SE:
	* tiboot3-j721e_sr1_1-hs-evm.bin
	* sysfw-j721e_sr1_1-hs-evm.itb
	* tispl.bin
	* u-boot.img

HS-FS:
	* tiboot3-j721e_sr2-hs-fs-evm.bin
	* sysfw-j721e_sr2-hs-fs-evm.itb
	* tispl.bin
	* u-boot.img

GP:
	* tiboot3.bin -->tiboot3-j721e-gp-evm.bin
	* sysfw.itb --> sysfw-j721e-gp-evm.itb
	* tispl.bin_unsigned
	* u-boot.img_unsigned

It is to be noted that the bootflow followed by J721E requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs

sysfw.itb:
	* TIFS
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* DM
	* ATF
	* OP-TEE
	* A72 SPL
	* A72 SPL dtbs

u-boot.img:
	* A72 U-Boot
	* A72 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
11ee37962e j721e: schema: yaml: Add general schema and J721E board config files
Schema file in YAML must be provided in board/ti/common for validating
input config files and packaging system firmware. The schema includes
entries for rm-cfg, board-cfg, pm-cfg and sec-cfg.

Board config files must be provided in board/ti/<devicename> in YAML.
These can then be consumed for generation of binaries to package system
firmware. Added YAML configs for J721E in particular.

Signed-off-by: Tarun Sahu <t-sahu@ti.com>
[n-francis@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Neha Malcom Francis
78144826bb binman: ti-secure: Add support for TI signing
The ti-secure entry contains certificate for binaries that will be
loaded or booted by system firmware whereas the ti-secure-rom entry
contains certificate for binaries that will be booted by ROM. Support
for both these types of certificates is necessary for booting of K3
devices.

Reviewed-by: Simon Glass <sjg@chromium.org>
[vigneshr@ti.com: fixed inconsist cert generation by multiple packing]
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Nikhil M Jain
12fdacea5a board: ti: am62x: evm: Update function calls for splash screen
Use spl_dcache_enable, in place of setup_dram, arch_reserve_mmu to set
up pagetable, initialise DRAM and enable Dcache to avoid multiple
function calls.

Check for CONFIG_SPL_VIDEO in place of CONFIG_SPL_VIDEO_TIDSS to prevent
any build failure in case video config is not defined and video related
functions are called.

Check for CONFIG_SPL_SPLASH_SCREEN and CONFIG_SPL_BMP before calling
splash_display to avoid compilation failure.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-21 15:32:12 -04:00
Nikhil M Jain
eeea6e298d board: ti: am62x: evm: Include necessary header files
At the time of compilation evm.c gives below warning for implicit
declaration of enable_caches, to mitigate this include cpu_func.h.

board/ti/am62x/evm.c: In function ‘spl_board_init’:
board/ti/am62x/evm.c:90:9: warning: implicit declaration of function ‘enable_caches’ [-Wimplicit-function-declaration]
90 |         enable_caches();

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-07-21 13:13:41 -04:00
Michal Simek
174d728471 arm64: zynqmp: Switch to amd.com emails
Update my and DPs email address to match current setup.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com
2023-07-21 09:00:38 +02:00
Ashok Reddy Soma
9a45365ae9 arm64: versal-net: spi: Update boot sequence dynamically
Currently xspi0 is used for all spi boot modes, it means it will use "sf
probe 0 0 0" for all spi's irrespective of which node it is wired.

Get boot sequence from dev_seq() and update boot command for xspi
dynamically.

As a result bootcmd for spi is updated as below when two instances of spi
are present in DT node.
bootcmd_xspi0=devnum_xspi=0; run xspi_boot
bootcmd_xspi1=devnum_xspi=1; run xspi_boot

xspi_boot=sf probe $devnum_xspi:0 0 0 && sf read $scriptaddr
$script_offset_f $script_size_f && echo XSPI: Trying to boot script at
${scriptaddr} && source ${scriptaddr}; echo XSPI: SCRIPT FAILED:
continuing...;

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230614093058.30438-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21 09:00:38 +02:00
Algapally Santosh Sagar
340760ec0f xilinx: zynq: Add the missing function prototypes
Add the missing prototypes for the functions pointed by the below
sparse warnings
warning: no previous prototype for 'set_dfu_alt_info'
[-Wmissing-prototypes]
warning: no previous prototype for 'board_debug_uart_init'
[-Wmissing-prototypes]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230614090359.10809-7-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21 09:00:38 +02:00
Algapally Santosh Sagar
3bfc94ba9c arm: zynq: Pass the missing argument type in function definition
Pass missing argument type in the function definition to fix the
sparse warning, warning: old-style function definition
[-Wold-style-definition]

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230614090359.10809-6-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-07-21 09:00:38 +02:00
Tom Rini
5dcfc99b2b Merge tag 'fsl-qoriq-2023-7-13' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Enable DM_SERIAL for T2080RDB, T4240RDB, T1042D4RDB, T1024RDB
2023-07-19 07:59:34 -04:00
Simon Glass
92ccaf7d97 sandbox: Install ACPI tables on startup
With x86 we set up the ACPI tables on startup so they can be examined. Do
the same with sandbox, so it is consistent.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17 17:23:15 +08:00
Simon Glass
f52a7f0537 sandbox: Correct header order in board file
Fix the header order in this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17 17:23:15 +08:00
Simon Glass
603363927a bios_emulator: Add Kconfig and adjust Makefile for SPL
The Kconfig for this is currently inside a particular board. Move it into
the correct place and allow use in SPL, so that video can be used there
if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-07-17 17:08:44 +08:00