Commit graph

9590 commits

Author SHA1 Message Date
Ajay Kumar Gupta
7b4292883b DA830: Add usb config
Adding USB configuration. Default is set for USB MSC host.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta
7359273d94 DA8xx: Add MUSB host support
Tested USB host functionality on DA830 EVM.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta
0b232310b2 DA8xx: Add GPIO register definitions
Added DA8xx GPIO base addresses in gpio_defs.h and pointers
to different BANKs which can be used to program GPIOs.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:07 +01:00
Ajay Kumar Gupta
82a821f89b DA830: Add pinmux for USB0_DRVVBUS
USB0_DRVVBUS pinmux configuration is required for USB functinality
in uboot.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
2010-01-09 10:25:06 +01:00
Heiko Schocher
a3f5da1bee mpc83xx: add support configure bus parking
Add support to configure bus parking mode and master in bus arbitration
configuration (ACR). Add this for the kmeter1 port:

Configure bus arbiter with recommended values from Freescale
to improve bus latency/throughput for application with
intensive QuiccEngine activity.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:39:42 -06:00
Reinhard Arlt
a0daa2e06f mpc83xx: vme8349: Fix power up reset sequence for tsi148
Remove PCI reset, if there is a monarch PMC module.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>

convert clrbits_be32 + setbits_be32 to clrsetbits_be32, use out_be32 to set gcr.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:36:30 -06:00
Reinhard Arlt
1dee9be683 mpc83xx: Add support for MPC8349 esd caddy2
The caddy2 is a variant of the already supported vme8349. So we just
add the differences to this board port. To better support those two
boards we switched from fixed SDRAM configuration to usage of
spd_sdram(). This is done by providing a board specific SPD EEPROM
routine with different values for both boards.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>

changed to use mkconfig -t option instead, plus misc codingstyle fixes.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:34:31 -06:00
Stefan Roese
7693640acd mpc83xx: spd_sdram.c: Disable memory controller before initializing
The memory controller could already be enabled, when spd_sdram() is
called. This could be the case for example, when the SDRAM is initialized
by the JTAG debugger.

The "sync" after the register access via the accessor function is
still needed, because the macro uses the sync before the real write
is done. So until not all accesses are converted to using accessor
functions, this sync still needs to be made "manually" here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd.eu>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:34:30 -06:00
Anton Vorontsov
2e95004deb mpc83xx: Add NAND boot support for MPC8315E-RDB boards
The core support for NAND booting is there already, so this patch
is pretty straightforward.

There is one trick though: top level Makefile expects nand_spl to
be in nand_spl/board/$(BOARDDIR), but we can fully reuse the code
from mpc8313erdb boards, and so to not duplicate the code we just
symlink nand_spl/board/freescale/mpc8315erdb to mpc8313erdb.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>

o silence make during ln echo
o update documentation
o and avoid:

$ ./MAKEALL MPC8315ERDB_NAND
Configuring for MPC8315ERDB board...
sdram.o: In function `fixed_sdram':
/home/r1aaha/git/u-boot/nand_spl/board/freescale/mpc8313erdb/sdram.c:72: undefined reference to `udelay'

by renaming udelay -> __udelay in the spirit of commit
3eb90bad65 "Generic udelay() with watchdog
support".

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-01-07 18:33:52 -06:00
Sanjeev Premi
b821cead7d onenand: Fix compile errors due to FlexOneNAND
This patch fixes the compile error while trying to
compile for omap3evm.

env_onenand.c: In function 'env_relocate_spec':
env_onenand.c:70: error: 'CONFIG_ENV_ADDR_FLEX' undeclared
 (first use in this function)
env_onenand.c:70: error: (Each undeclared identifier is re
ported only once
env_onenand.c:70: error: for each function it appears in.)
env_onenand.c: In function 'saveenv':
env_onenand.c:106: error: 'CONFIG_ENV_ADDR_FLEX' undeclare
d (first use in this function)
env_onenand.c:107: error: 'CONFIG_ENV_SIZE_FLEX' undeclare
d (first use in this function)

Signed-off-by: Sanjeev Premi <premi@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2010-01-06 16:28:00 -06:00
Nick Thompson
20da6f4d93 Davinci: davinci_nand.c performance enhancments
Introduces various optimisations that approximately triple the
read data rate from NAND when run on da830evm.

Most of these optimisations depend on the endianess of the machine
and most of them are very similar to optimisations already present
in the Linux Kernel.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-06 16:11:16 -06:00
Tom Rix
06f95959bc ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit c9f937e4a3f4ebf9924ec21d80632e5eb61d949c

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2010-01-06 09:36:24 -06:00
Becky Bruce
8b0ab30494 ppc/p4080: Add Corenet Platform Cache (CPC) registers
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:52:00 -06:00
Dave Liu
3e731aaba3 fsl-ddr: setup ODT_RD_CFG & ODT_WR_CFG when we interleave
In chip-select interleaving case, we also need set the ODT_RD_CFG
and ODT_WR_CFG in cs1_config register.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:50:07 -06:00
Dave Liu
1aa3d08a02 fsl-ddr: add override for the Rtt_Wr
Different boards may require different settings of Dynamic ODT (Rtt_Wr).
We provide a means to allow the board specific code to provide its own
value of Rtt_Wr.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:27 -06:00
Dave Liu
bdc9f7b5ea fsl-ddr: add the override for write leveling
add the override for write leveling sampling and
start time according to specific board.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Dave Liu
0a71c92c7e fsl-ddr: Fix power-down timing settings
1. TIMING_CFG_0[ACT_PD_EXIT] was set to 6 clocks, but
   It should be set to tXP parameter, tXP=max(3CK, 7.5ns)
2. TIMING_CFG_0[PRE_PD_EXIT] was set to 6 clocks, but
   It should be set to tXP (if MR0[A12]=1) else to tXPDLL parameter
   We are setting the mode register MR0[A12]='1'

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Anton Vorontsov
c4ca10f1db mpc85xx: Add 4-bits eSDHC support for MPC8569E-MDS boards
Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
Family Reference Manual, Rev. 0" document, which describes all eSDHC
pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Kumar Gala
bc20f9a952 ppc/p4080: Fix reporting of PME & FM clock frequencies
We incorrectly had the sense of PME_CLK_SEL, FM1_CLK_SEL, FM2_CLK_SEL
backwards so we report the wrong frequency.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:10 -06:00
Li Yang
de3cbd78c9 fsl_law: add SRIO2 target id and law_size_bits() macro
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala
abc76eb6a6 ppc/85xx: Map boot page guarded for MP boot
We already map the page cache-inhibited.  There is no reason we
shouldn't also be marking it guarded to prevent speculative accesses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala
effe4973f2 ppc: Added macro to test for specific SVR revision
Various SoC errata are specific to a given revision of silicon. This
patch gives us a simple macro to use when doing such tests.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Dave Liu
f5ecc6e027 p4080: add readback to bootpage translation window
We need to add the readback to bootpage translation LAW
to make it effect.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:09 -06:00
Kumar Gala
5fb6ea3ad3 ppc/85xx: Make flash TLB entry determined at runtime on FSL boards
Rather than hard coding which TLB entry the FLASH is mapped with we can
use find_tlb_idx to determine the entry.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
783852e467 ppc/85xx: Remove CONFIG_SYS_DDR_TLB_START
Now that we dynamically determine TLB CAM entries to use we dont need
CONFIG_SYS_DDR_TLB_START anymore.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
355f4f85e9 ppc/85xx: Make SPD DDR TLB setup code use dynamic entry allocation
Now that we track which TLB CAM entries are used we can allocate
entries on the fly.  Change the SPD DDR TLB setup code to assume
we use at most 8 TLBs (or the number free, which ever is fewer).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
94e9411b9d ppc/85xx: Add tracking of TLB CAM usage
We need to track which TLB CAM entries are used to allow us to
"dynamically" allocate entries later in the code.  For example the SPD
DDR code today hard codes which TLB entries it uses.  We can now make
that pick entries that are free.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:08 -06:00
Kumar Gala
ee53650dad ppc/8xxx: Remove is_fsl_pci_agent
All users of is_fsl_pci_agent have been converted to fsl_is_pci_agent
that uses the standard PCI programming model to determine host vs
agent/end-point.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
7cb8f79b44 ppc/85xx: Move to using fsl_setup_hose on TQM 85xx
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
9263e829f0 ppc/85xx: Move to using fsl_setup_hose on P2020 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
1e21ba8f6d ppc/85xx: Move to using fsl_setup_hose on P1/P2 RDB
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Kumar Gala
42c01b9d1f ppc/85xx: Move to using fsl_setup_hose on MPC8572 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or
a host.  Rather than using some SoC specific register we can just look
at the PCI cfg space of the host controller to determine this.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
5e3d7050cf ppc/86xx: Clean up MPC8610 HPCD PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
7b626880b4 ppc/85xx: Clean up MPC8548 CDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
feadd5d53b ppc/85xx: Clean up ATUM8548 PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:06 -06:00
Kumar Gala
4681457e2a ppc/85xx: Clean up MPC8568 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
c847e98b14 ppc/85xx: Clean up MPC8569 MDS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
645d5a7838 ppc/85xx: Clean up MPC8544 DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Mingkai Hu
8a414c4258 ppc/85xx: Clean up MPC8536 DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:05 -06:00
Kumar Gala
3ad89c4ecb NET: Base support for etsec2.0
1. Modified the tsec_mdio structure to include the new regs
2. Modified the MDIO_BASE_ADDR so that it will handle both
older version and new version of etsec.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:04 -06:00
Sandeep Gopalpet
b9e186fc31 NET: Move MDIO regs out of TSEC Space
Moved the mdio regs out of the tsec structure,and
provided different offsets for tsec base and mdio
base so that provision for etsec2.0 can be provided.

This patch helps in providing the support for etsec2.0
In etsec2.0, the MDIO register space and the etsec reg
space are different.

Also, moved the TSEC_BASE_ADDR and MDIO_BASE_ADDR definitons into
platform specific files.

Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:04 -06:00
Kumar Gala
bcad21fda1 85xx: Add support to set DPAA (data path) devices clock frequencies
Set clock-frequency for Frame Manager 0/1 and Patter Match Engine on p4080.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:04 -06:00
Kumar Gala
178e39e199 ppc/8xxx: Don't use pci_cfg on FSL_CORENET platforms
The FSL_CORENET platforms use a completely different means to determine
which PCIe port is enabled as well as if its a host or agent/end-point.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:03 -06:00
Kumar Gala
11588b5dc4 ppc/p4080: Added p4080 SERDES registers & USB offset
Added immap definition for SERDES registers on p4080, the USB offset
(since it was missing) and a GPL header.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:03 -06:00
Kumar Gala
82fd1f8da9 85xx: Add support for e500mc cache stashing
The e500mc core supports the ability to stash into the L1 or L2 cache,
however we need to uniquely identify the caches with an id.

We use the following equation to set the various stash-ids:

32 + coreID*2 + 0(L1) or 1(L2)

The 0 (for L1) or 1 (for L2) matches the CT field used be various cache
control instructions.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:02 -06:00
Nick Thompson
26be2c53d6 Davinci: NAND enable ECC even when not in NAND boot mode
Davinci: NAND enable ECC even when not in NAND boot mode

On Davinci platforms, the default NAND device is enabled (for ECC)
in low level boot code when NAND boot mode is used. If booting in
another mode, NAND ECC is not enabled. The driver should make
sure ECC is enabled regardless of boot mode if NAND is configured
in U-Boot.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
2010-01-04 08:48:17 -06:00
Nick Thompson
97f4eb8cfb Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects

Add a CONFIG_SYS_NAND_CS setting to all davinci configs and
use it to setup the NAND controller in the davinci_nand
mtd driver.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2010-01-04 08:48:17 -06:00
Nick Thompson
90110e0eab Davinci: Table driven pinmux configuration
Davinci: Table driven pinmux configuration

Add code to allow pinmux_config tables to be grouped and configured
as a single resource. This removes multiple calls to the pinmux
configuration code from board_init and allows pinmuxes to be
individually configured and added by data manipulation only.

All related #ifdefs can the be removed from board_init code and
since the compiler optimises away statics, #ifdefs can be reduced in
the data definitions as well.

Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
2010-01-04 08:48:16 -06:00
Robert P. J. Day
1270ec13d4 Remove superfluous uses of V_PROMPT macro.
A number of config files define the V_PROMPT macro for the
command-line prompt, only to immediately use that macro to define
CONFIG_SYS_PROMPT, making V_PROMPT entirely superfluous.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2010-01-04 08:48:16 -06:00
Grazvydas Ignotas
8b432bebc2 pandora: don't enable VAUX3, VDAC and VPLL2 regulators
These regulators are not needed to start the kernel and only
cause "incomplete constraints" warnings from kernel, so don't
turn them on to save power.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2010-01-04 08:48:16 -06:00