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mpc83xx: vme8349: Fix power up reset sequence for tsi148
Remove PCI reset, if there is a monarch PMC module. Signed-off-by: Reinhard Arlt <reinhard.arlt@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de> convert clrbits_be32 + setbits_be32 to clrsetbits_be32, use out_be32 to set gcr. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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2 changed files with 61 additions and 8 deletions
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@ -2,6 +2,9 @@
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* pci.c -- esd VME8349 PCI board support.
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* Copyright (c) 2006 Wind River Systems, Inc.
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* Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
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* Copyright (c) 2009 esd gmbh.
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*
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* Reinhard Arlt <reinhard.arlt@esd-electronics.com>
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*
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* Based on MPC8349 PCI support but w/o PIB related code.
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*
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@ -32,6 +35,7 @@
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#include <pci.h>
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#include <i2c.h>
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#include <asm/fsl_i2c.h>
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#include "vme8349pin.h"
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DECLARE_GLOBAL_DATA_PTR;
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@ -93,17 +97,22 @@ pci_init_board(void)
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udelay(2000);
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/*
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* Assert/deassert PCI reset
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* Assert/deassert VME reset
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*/
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setbits_be32(&immr->gpio[0].dat, 0x00800000);
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setbits_be32(&immr->gpio[0].dir, 0x00800000);
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setbits_be32(&immr->gpio[1].dir, 0x08800000);
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clrsetbits_be32(&immr->gpio[1].dat,
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GPIO2_TSI_POWERUP_RESET_N | GPIO2_TSI_PLL_RESET_N,
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GPIO2_VME_RESET_N | GPIO2_L_RESET_EN_N);
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setbits_be32(&immr->gpio[1].dir, GPIO2_TSI_PLL_RESET_N |
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GPIO2_TSI_POWERUP_RESET_N |
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GPIO2_VME_RESET_N |
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GPIO2_L_RESET_EN_N);
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clrbits_be32(&immr->gpio[1].dir, GPIO2_V_SCON);
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udelay(200);
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setbits_be32(&immr->gpio[1].dat, 0x08000000);
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setbits_be32(&immr->gpio[1].dat, GPIO2_TSI_PLL_RESET_N);
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udelay(200);
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setbits_be32(&immr->gpio[1].dat, 0x08800000);
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setbits_be32(&immr->gpio[1].dat, GPIO2_TSI_POWERUP_RESET_N);
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udelay(600000);
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clrbits_be32(&immr->gpio[1].dat, 0x00100000);
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clrbits_be32(&immr->gpio[1].dat, GPIO2_L_RESET_EN_N);
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/* Configure PCI Local Access Windows */
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pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
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@ -114,6 +123,14 @@ pci_init_board(void)
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udelay(2000);
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if (monarch == 0)
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if (monarch == 0) {
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mpc83xx_pci_init(1, reg, 0);
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} else {
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/*
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* Release PCI RST Output signal
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*/
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out_be32(&immr->pci_ctrl[0].gcr, 0);
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udelay(2000);
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out_be32(&immr->pci_ctrl[0].gcr, 1);
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}
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}
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36
board/esd/vme8349/vme8349pin.h
Normal file
36
board/esd/vme8349/vme8349pin.h
Normal file
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@ -0,0 +1,36 @@
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/*
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* vme8349pin.h -- esd VME8349 MPC8349 I/O pin definition.
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* Copyright (c) 2009 esd gmbh.
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*
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* Reinhard Arlt <reinhard.arlt@esd-electronics.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef __VME8349PIN_H__
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#define __VME8349PIN_H__
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#define GPIO2_V_SCON 0x80000000 /* In: from tsi148 1: is syscon */
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#define GPIO2_VME_RESET_N 0x20000000 /* Out: to tsi148 */
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#define GPIO2_TSI_PLL_RESET_N 0x08000000 /* Out: to tsi148 */
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#define GPIO2_TSI_POWERUP_RESET_N 0x00800000 /* Out: to tsi148 */
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#define GPIO2_L_RESET_EN_N 0x00100000 /* Out: 0:vme can assert cpu lrst*/
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#endif /* of ifndef __VME8349PIN_H__ */
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