Commit graph

50736 commits

Author SHA1 Message Date
Bin Meng
fb05f0b02b x86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME
As README.x86 already mentions, there are two SPI flashes mounted
on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively.
SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores
the actual BIOS image which is U-Boot. Building a single image with
both ME firmware and U-Boot does not make sense.

This also describes the exact flash location where the u-boot.rom
should be programmed in the documentation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
80abc8165e x86: cougarcanyon2: Update dts for SPI lock down
It turns out that like Braswell, Intel FSP for IvyBridge requires
SPI controller settings to be locked down, as the U-Boot ICH SPI
driver fails with the following message on Cougar Canyon 2 board:

  "ICH SPI: Opcode 9f not found"

Update the SPI node property to indicate this fact.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
b173b4ea34 x86: ivybridge: Imply USB_XHCI_HCD
The Panther Point chipset connected to Ivybridge has xHC integrated,
imply it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
9fddf6c7dd usb: xhci-pci: Fix compiler warning
This fixes the following compiler warning:

  "warning: cast from pointer to integer of different size
  [-Wpointer-to-int-cast]"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
341dda352d x86: baytrail: Correct the comment of IACORE_VIDS bit ranges
The guaranteed vid bit ranges in IACORE_VIDS MSR is actually
[22:16]. This corrects the comment for it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Andy Shevchenko
919c1c1204 x86: acpi: Adopt new version of iASL compiler
The commit

  f9a88a4c1cd0 ("iASL: Enhance the -tc option (create AML hex file in C)")

in ACPICA project changed a template of the variable that is used
in the generated C-file. Now, instead of hard coded "AmlCode" the
"%s_aml_code" is in use, where the prefix is a lowered case base
name of the output file. In our case it will be "dsdt" producing
a name as "dsdt_aml_code".

The quick solution is to call sed which replaces new name by the
old one to keep compatibility with old version of iASL.

The long term solution would be to modify code to use the new name
because it is more scalable.

Cc: Robert Moore <robert.moore@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Evan Lloyd <evan.lloyd@arm.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed two sentences in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-13 09:50:57 +08:00
Christian Gmeiner
acc2482fd8 x86: tsc: add support for reading CPU freq from cpuid
Starting with cpuid level 0x16 (Skylake-based processors)
it is possible to get CPU base freq via cpuid.

This fixes booting on a skylake based system.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed wrong indention of labels]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-13 09:50:57 +08:00
Tom Rini
7868909ed5 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-06-12 13:25:24 -04:00
Tom Rini
7a4a3503d5 Merge git://git.denx.de/u-boot-marvell 2018-06-12 07:26:15 -04:00
Dennis Gilmore
ae28a5f830 arm: mvebu: Add Helios4 Armada 38x initial support
The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-06-12 13:17:19 +02:00
Vinitha V Pillai
2d91b53331 LS1012AFRWY: Add Secure Boot support
Added the following:
1. defconfig for LS1012AFRWY Secure boot
2. PfE Validation support

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-11 12:34:45 -07:00
Bhaskar Upadhaya
9629ccdde7 board: ls1012a: FRWY-LS1012A board support
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE
MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
[yorks: rebase and fix SPDX tag]
[yorks: fix board/freescale/ls1012afrdm/Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-11 12:34:45 -07:00
Bhaskar Upadhaya
7191d45348 board: Kconfig: Re-Arrangement of PPA firmware and header addresses
PPA firmware and header address may vary depending upon different
boards, configure ppa firmware and header address in board specific
Kconfig.

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:43:19 -07:00
Jagdish Gediya
73dc91f9c4 arm: ls1021aqds: config: enable CONFIG_ID_EEPROM for mac command
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:43:19 -07:00
Priyanka Jain
4911948ec7 board/freescale,lsch3: Add entry for 0.9v
As per updated hardware documentation for
lsch3 based chips like LS2088A, 0.9v support
has been added in possible supported SoC volatges

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:43:11 -07:00
Ran Wang
d93a18f77c armv8: ls1088a: Enable USB in ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-06-08 16:39:22 -07:00
Tom Rini
813d1fb56d Merge branch 'master' of git://git.denx.de/u-boot-ubi 2018-06-08 10:08:20 -04:00
Tom Rini
8da19df5b5 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2018-06-08 10:00:46 -04:00
Tom Rini
8f48cf9f17 Merge git://git.denx.de/u-boot-dm 2018-06-08 07:20:08 -04:00
Seung-Woo Kim
71002b508a cmd: add missing line breaks for pr_err()
After the commit 9b643e312d ("treewide: replace with error() with
pr_err()"), there are some pr_err() with no line break. Add missing
line breaks.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-06-07 20:06:29 -04:00
Seung-Woo Kim
5c890b1bc8 board: samsung: add missing line breaks for pr_err()
After the commit 9b643e312d ("treewide: replace with error() with
pr_err()"), there are some pr_err() with no line break. Add missing
line breaks.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2018-06-07 20:06:29 -04:00
Seung-Woo Kim
e94b93d5bb script: Make get_default_envs.sh script exclude tools/env
If building envtools, there is env directory in tools directory.
Mafe the get_default_envs.sh script exclude tools/env directory.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2018-06-07 20:06:29 -04:00
Ramon Fried
b5e0e360fd common: iotrace: add timestamp to iotrace records
Add timestamp to each iotrace record to aid in debugging
of IO timing access bugs.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 17:08:07 -04:00
Ramon Fried
a74440b27b iotrace: add IO region limit
When dealing with a lot of IO regions, sometimes
it makes sense only to trace a specific one.
This patch adds support for region limits.
If region is not set, the iotrace works the same as it was.
If region is set, the iotrace only logs io operation that falls
in the defined region.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 17:08:06 -04:00
Ramon Fried
b559c4af80 cmd: iotrace: add set region command
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 17:08:06 -04:00
Ramon Fried
948f32c856 bug.h: introduce WARN_ONCE
Add WARN_ONCE definition to allow single time notification
of warnings to the user.
Taken from Linux kernel (4.17) with slight changes
(Removed __section(.data.once))

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
[trini: Drop the musb and dwc3 compat versions]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-07 17:08:06 -04:00
Simon Glass
844e5b20f2 binman: Mark 'align-end' as implemented
The documentation says this is not implemented, but it is. Update the
documentation, and clarify its operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
c8d48efb2b binman: Add support for adding a name prefix to entries
Sometimes we have several sections which repeat the same entries (e.g. for
a read-only and read-write version of the same section). It is useful to
be able to tell these entries apart by name.

Add a new 'name-prefix' property for sections, which causes all entries
within that section to have a given name prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
3b0c3821d6 binman: Add support for outputing a map file
It is useful to be able to see a list of regions in each image produced by
binman. Add a -m option to output this information in a '.map' file
alongside the image file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
7ae5f315b3 binman: Tidy up some docs and comments
Fix a few missing comments and tidy up some existing ones.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
084059a31f binman: Allow a single test to be executed
Provide an easy way to execute a single binman test by specifying it on
the command line.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
258fb0e677 binman: Add documentation for pos-unset property
This property is not documented. Add a note to the README.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
1854695bd8 binman: Add support for sections
It is useful to be able to split an image into multiple sections,
each with its own size and position, for cases where a flash device has
read-only and read-write portions.

Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
badf0ec6e4 binman: Avoid setting sys.path globally
At present we set the Python path at the start of binman so we can read
modules in the 'etype' directory. This is a bit messy since it affects
'import' statements through binman.

Adjust the code to set the path locally, just where it is needed. Move
the 'entry' module in with the other base modules to help with this. It
makes more sense here anyway since it does not implement an entry type.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
25ac0e61fe binman: Rename Entry property to 'section'
Entries are now passed a Section object rather than an Image. Rename this
property to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:08 -08:00
Simon Glass
f55382b5e5 binman: Rename ELF parameters to 'section'
We now pass a Section object to these functions rather than an Image.
Rename the parameters to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Simon Glass
8f1da50ccc binman: Refactor much of the image code into 'section'
We want to support multiple sections within a single image. To do this,
move most of the Image class implementation into a new Section class. An
Image contains only a single Section, but at some point we will support
a new 'section' entry, thus allowing Sections within Sections.

Use the name 'bsection' for the module so we can use 'section' for the
etype module.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Simon Glass
dd57c13bbc binman: Allow unit addresses for binaries
Allow the same binary to appear multiple times in an image by using the
device-tree unit-address feature (u-boot@0, u-boot@1).

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Alex Kiernan
48ae412424 buildman: Add support for environment delta in summary
When summarising the builds, add the -U option to emit delta lines for
the default environment built into U-Boot at each commit.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Alex Kiernan
0ddc510ea3 buildman: Extract environment as part of each build
As we're building the boards, extract the default U-Boot environment to
uboot.env so we can interrogate it later.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Simon Glass
bf6226c3c4 test: Fix sandbox_spl test filter
This filter does not match the test it is intended to anymore. Update it
so that it works again.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-07 11:25:07 -08:00
Simon Glass
4225a4e4a9 patman: Fix unit tests for SPDX
The format of this line has changed. Update the patman test to suit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-06-07 11:25:03 -08:00
Tom Rini
46960ad6d0 block: Have BLOCK_CACHE default to y in some cases
When dealing with filesystems that come from block devices we can get a
noticeable performance gain in some use cases from having the block
cache enabled.  The code paths are valid in other cases when we have BLK
set and may provide wins in raw reads in some use cases, so have this be
default when BLK is enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-06-07 09:12:26 -04:00
Mans Rullgard
66a00be287 ARM: orion5x: fix use of callee-saved registers in lowloevel_init
The lowlevel_init function uses r4 and r6 without preserving their
values as required by the AAPCS.  Use r0 and r2 instead as these
are call-clobbered.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2018-06-07 09:12:26 -04:00
Baruch Siach
d78ecc7339 mvebu: turris_omnia: add note about i2c slave disable
Code that disables the i2c slave is now in the mvtwsi i2c driver.
Platform must enable DM_I2C to use that code. Add a comment in the code
as a reminder for the planned DM_I2C migration of Turris Omnia.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-06-07 14:20:09 +02:00
Baruch Siach
173ec35191 i2c: mvtwsi: disable i2c slave on Armada 38x
Equivalent code that disables the hidden i2c0 slave already exists in
the Turris Omnia platform specific code. But this hidden i2c0 slave that
interferes the i2c bus is not board specific. Armada 38x SoCs and at
least some Kirkwood variants are affected as well. Add code to disable
this slave to the i2c bus driver to make it work on all affected
hardware.

Use the bind callback because we want this to always run at boot,
regardless of whether U-Boot uses the i2c bus.

Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2018-06-07 14:19:55 +02:00
Tom Rini
3eceff642c Merge branch 'master' of git://git.denx.de/u-boot-samsung 2018-06-06 09:08:16 -04:00
Tom Rini
5b2e9a8cf9 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-06-06 07:16:43 -04:00
Stefan Roese
78306cba11 mtd: ubi: Add missing newlines in ubi_init()
I just stumbled over some cluttered UBI messages. It seems some newline
chars are missing in the current U-Boot UBI source. Lets fix this
in U-Boot as well (Linux has those fixes already).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2018-06-06 10:25:13 +02:00
Patrice Chotard
6b6255cd8a mach-stm32: Enable SPL_RESET_SUPPORT flag
Since commit 0e373c0ade ("spl: add SPL_RESET_SUPPORT"),
reset is supported in SPL, enable this flag for STM32F SoCs family.

This allows to remove a specific case in RCC mfd driver.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-06-05 20:19:09 -04:00