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4581 commits

Author SHA1 Message Date
Simon Glass
50834884a8 Record the position of the SMBIOS tables
Remember where these end up so that we can pass this information on to
the EFI layer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Tom Rini
7e6e40c572 Prepare v2023.10-rc3
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Merge tag 'v2023.10-rc3' into next

Prepare v2023.10-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-08-21 17:32:17 -04:00
Tom Rini
2d8e7ac320 ARM: tegra: Changes for v2023.10-rc1
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
 has some other minor enhancements, such as enabling the poweroff command
 on several Tegra210 and Tegra186 boards.
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Merge tag 'tegra-for-2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-tegra

ARM: tegra: Changes for v2023.10-rc1

This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
2023-08-18 10:05:04 -04:00
Sean Anderson
726a802fda arm: Use builtins for ffs/fls
Since ARMv5, the clz instruction allows for efficient implementation of
ffs/fls with builtins. Until ARMv7 (with Thumb-2), this instruction is
only available in ARM mode. LTO makes it difficult to force specific
functions to be in ARM mode, as it is effectively a form of very
aggressive inlining. To work around this, fls/ffs are implemented in
assembly for ARMv5 and ARMv6 when compiling U-Boot in Thumb mode.
Overall, this saves around 75 bytes per call.

This code is synced with v5.15 of the Linux kernel.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-17 16:39:20 -04:00
Massimo Pegorer
0cd87aac5c clk: rockchip: rk3308: Support reading UART rate and clock registers
Add support to read RK3308 registers used to configure UART clocks, and
thus to get UART rate and baudrate. This fixes clock_get_rate returning
error on serial device probing. Moreover, there is no need anymore to
use 'clock-frequency' property for UART nodes in *-u-boot.dtsi files
for all cases where UART is not inited by U-Boot proper or by SPL o by
TPL code but by a preliminary external boot phase (for Rock PI S, UART
is inited by external TPL).

Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12 10:37:57 +08:00
Jonas Karlman
6da8400d7a clk: rockchip: rk3568: Fix mask for clk_cpll_div_25m_div
The field for clk_cpll_div_25m_div in CRU_CLKSEL_CON81 is 6 bits wide,
not 5 bits wide as currently defined in CPLL_25M_DIV_MASK.

Fix this and the assert so that CPLL_25M can be assigned a 25 MHz rate.

Fixes: 4a262feba3 ("rockchip: rk3568: add clock driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12 10:35:35 +08:00
Anton
6e710897aa rockchip: cru: Enable cpu info support for rk3568
Add cru structure definition in head file to support cpu_info driver.

Series-version: 2
Series-changes: 2
Format the patch header, add commit message and signature.

Signed-off-by: Anton <vao@asu-vei.ru>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-12 10:28:30 +08:00
Shiji Yang
506df9dc58 treewide: rework linker symbol declarations in sections header
1. Convert all linker symbols to char[] type so that we can get the
   corresponding address by calling array name 'var' or its address
   '&var'. In this way, we can avoid some potential issues[1].
2. Remove unused symbol '_TEXT_BASE'. It has been abandoned and has
   not been referenced by any source code.
3. Move '__data_end' to the arch x86's own sections header as it's
   only used by x86 arch.
4. Remove some duplicate declared linker symbols. Now we use the
   standard header file to declare them.

[1] This patch fixes the boot failure on MIPS target. Error log:
SPL: Image overlaps SPL

Fixes: 1b8a1be1a1 ("spl: spl_legacy: Fix spl_end address")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-08-09 09:21:42 -04:00
Tom Rini
226ecf8be4 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
For once this adds USB support for two SoCs: the H616 and the F1C100s
series. The rest is support for LPDDR3 DRAM chips on H616 boards.

Gitlab CI passed, and I booted that briefly on an H616 and an F1C200s
board. I don't have an H616 board with LPDDR3 DRAM, but reportedly that
works for Mikhail, and doesn't regress on my DDR3 boards.
2023-07-21 10:01:11 -04:00
Andre Przywara
78aa00c38e sunxi: H616: dram: split struct dram_para
Currently there is one DRAM parameter struct for the Allwinner H616 DRAM
"driver". It contains many fields that are compile time constants
(set by Kconfig variables), though there are also some fields that are
probed and changed over the runtime of the DRAM initialisation.

Because of this mixture, the compiler cannot properly optimise the code
for size, as it does not consider constant propagation in its full
potential.

Help the compiler out by splitting that structure into two: one that only
contains values known at compile time, and another one where the values
will actually change. The former can then be declared "const", which will
let the compiler fold its values directly into the code using it.

We also add "const" tags for some new "struct dram_config" pointers, to
further increase code optimisation.
To help the compiler optimise the code further, the definition of the
now "const struct dram_para" has to happen at a file-global level, so
move that part out of sunxi_dram_init().

That results in quite some code savings (almost 2KB), and helps to keep
the code small with the LPDDR3 support added later.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-07-21 00:29:42 +01:00
Andre Przywara
457e2cd665 sunxi: H616: dram: const-ify DRAM function parameters
There are quite some functions in the Allwinner H616 DRAM "driver", some
of them actually change the parameters in the structure passed to them,
but many are actually not.
To increase the optimisation potential for the code, mark those functions
that just read members of the passed dram_para struct as "const".
This in itself does not decrease the code size, but lays the groundwork
for future changes doing so.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-07-21 00:29:42 +01:00
Tom Rini
9ef4166ff9 arm: mx5: Correct mxc_set_clock function prototype
With gcc-13.1 we get a warning about enum vs int here, so correct the
declaration to match the implementation.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-20 14:48:20 -04:00
Jim Liu
4b7f29ff14 arch: arm: npcm8xx: add cpu version and 4G ram support
Add npcm8xx A2 cpu version check
and add 4G RAM support

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-07-14 12:52:18 -04:00
Peng Fan
14d7eedf77 imx: imx8m: add CAAM_BASE_ADDR
Add CAAM_BASE_ADDR which will be used by priblob.c

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Ye Li
00ce4153fb imx: ahab: Update AHAB for iMX8 and iMX8ULP
Abstract common interfaces for AHAB authentication operations.
Then share some common codes for AHAB and SPL container authentication

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Ye Li
e8cd1f60d9 imx: imx8: bootaux: Add i.MX8 M4 boot support
1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download
   M4 image to any DDR address first. Then use the
   "bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0
   or CM4_1, the default core id is 0 for CM4_0.

   Since current M4 only supports running in TCM. The bootaux will copy
   the M4 image from DDR to its TCML.

2. Implment bootaux for HIFI on QXP
   command: bootaux 0x81000000 1

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
9395eb05ee imx: bootaux: change names of MACROs used to boot MCU on iMX devices
The current bootaux supports i.MX8M and i.MX93, but the name "_M4_"
implies that the SoCs have Cortex-M4. Actually i.MX8MM/Q use Cortex-M4,
i.MX8MN/P use Cortex-M7, i.MX93 use Cortex-M33, so use "_MCU_" in place
of "_M4_" to simplify the naming.

Signed-off-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
1c3f5df259 imx: imx8ulp: start the ELE RNG at boot
On the imx8ulp A1 SoC, the ELE RNG needs to be manually started.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
d0e2a012a3 imx: ele_api: add DEK Blob generation
- Add crc computation.
- Add ele_generate_dek_blob API for encrypted boot support.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
31e5ec2323 imx: ele_api: support program secure fuse and return lifecycle
Add two ELE API: ele_return_lifecycle_update and ele_write_secure_fuse
Add two cmd: ahab_return_lifecycle and ahab_sec_fuse_prog

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Peng Fan
d3ee9dbd59 imx: use generic name ele(EdgeLockSecure Enclave)
Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave
code including comment, folder and API name to ELE to align.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13 11:29:40 +02:00
Tom Rini
e80f4079b3 Prepare v2023.07-rc6
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Merge tag 'v2023.07-rc6' into next

Prepare v2023.07-rc6
2023-07-05 11:28:55 -04:00
Marek Vasut
2b17dd1d9d ARM: arm11: Add C wrapper for allow_unaligned()
Rename current assembler implementation of allow_unaligned() to
arm11_arch_cp15_allow_unaligned() and add it into arm11.h header,
then add C wrapper of allow_unaligned().

This fixes misbehavior when linking U-Boot, where the CPU specific
allow_unaligned() implementation was ignored and instead the
__weak allow_unaligned() implementation from lib/efi_loader/efi_setup.c
was used, which led to "data abort" just before booting Linux via tftp,
in efi_dp_from_file() -> path_to_uefi() -> utf16_put() .

The problem is triggerd by c7c0ca3767 ("efi_loader: fix efi_dp_from_file()") .
Adding the wrapper fixes the problem.

Fixes: d47a774680 ("arm: arm11: allow unaligned memory access")
Signed-off-by: Marek Vasut <marex@denx.de>
2023-07-01 17:29:15 +02:00
Marek Vasut
c32248601c ARM: armv7: Add C wrapper for allow_unaligned()
Rename current assembler implementation of allow_unaligned() to
v7_arch_cp15_allow_unaligned() and add it into armv7.h header,
then add C wrapper of allow_unaligned().

This fixes misbehavior when linking U-Boot on ARMv7a i.MX6Q, where the
CPU specific allow_unaligned() implementation was ignored and instead the
__weak allow_unaligned() implementation from lib/efi_loader/efi_setup.c
was used, which led to "data abort" just before booting Linux via tftp,
in efi_dp_from_file() -> path_to_uefi() -> utf16_put() .

The problem is triggerd by c7c0ca3767 ("efi_loader: fix efi_dp_from_file()") .
Adding the wrapper fixes the problem.

Fixes: 78f90aaeec ("arm: armv7: allow unaligned memory access")
Signed-off-by: Marek Vasut <marex@denx.de>
2023-07-01 17:29:15 +02:00
Svyatoslav Ryhel
d83721f1d4 ARM: tegra: add SoC UID calculation function
This is a small tool for calculation of SoC UID based on the same
Linux function. It can be further used for generation of device
unique data like mac address or exposing it as serial number.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-06-30 15:20:37 +02:00
Alexey Romanov
eb0a01e603 arch/arm: meson: sm: introduce power domain functions
This commit adds functions to manage secure power domain for
Amlogic SoC's using smc functionality.

Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230531093156.29240-2-avromanov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28 10:05:34 +02:00
Igor Prusov
0e3f7e9c98 ARM: meson: add A1 support
Add support for Amlogic A1 SoC family.

Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Signed-off-by: Evgeny Bachinin <eabachinin@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230505125639.3605-4-ivprusov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28 10:05:34 +02:00
Tom Rini
7da82de916 Xilinx changes for v2023.10-rc1
global:
 - Use proper U-Boot project name
 
 Fix sparse warnings in zynqmp-clk, zynqmp handoff, board
 
 cmd:
 - Cover incorrect 0 length entries
 
 Versal NET:
 - Add bootmode logic
 - Support SPP production version
 - Add loadpdi command
 
 ZynqMP:
 - Clear pmufw node command ID handling
 - Change power domain behavior around zynqmp_pmufw_node()
 - Fix zynqmp cmd return values and pmufw command
 - Fix R5 tcm init and modes
 
 mmc:
 - Sync Versal NET emmc DT binding
 
 pcie:
 - Add support for ZynqMP PCIe root port
 
 video:
 - Add support for ZynqMP DP
 
 tools:
 - Fix debug message in relocate-rela
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Merge tag 'xilinx-for-v2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2023.10-rc1

global:
- Use proper U-Boot project name

Fix sparse warnings in zynqmp-clk, zynqmp handoff, board

cmd:
- Cover incorrect 0 length entries

Versal NET:
- Add bootmode logic
- Support SPP production version
- Add loadpdi command

ZynqMP:
- Clear pmufw node command ID handling
- Change power domain behavior around zynqmp_pmufw_node()
- Fix zynqmp cmd return values and pmufw command
- Fix R5 tcm init and modes

mmc:
- Sync Versal NET emmc DT binding

pcie:
- Add support for ZynqMP PCIe root port

video:
- Add support for ZynqMP DP

tools:
- Fix debug message in relocate-rela
2023-06-12 16:42:37 -04:00
Tom Rini
260d4962e0 Merge tag v2023.07-rc4 into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-12 14:55:33 -04:00
Michal Simek
1be82afa80 global: Use proper project name U-Boot
Use proper project name in comments, Kconfig, readmes.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0dbdf0432405c1c38ffca55703b6737a48219e79.1684307818.git.michal.simek@amd.com
2023-06-12 13:24:31 +02:00
Sam Edwards
9bc6f1a4d0 sunxi: Fix typo in include guard
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-06-07 22:45:02 +01:00
Leo Yan
4787c764f9 arm64: Remove duplicated symbols
When build U-boot with clang with using commands:

  $ make HOSTCC=clang xenguest_arm64_defconfig
  $ make HOSTCC=clang CROSS_COMPILE=aarch64-linux-gnu- \
		CC="clang -target aarch64-linux-gnueabi" -j8

The compiler reports error:

  /tmp/start-acdf31.s:330:1: error: symbol '_start' is already defined
  _start:
  ^

Because the symbol '_start' has been defined twice, one is defined in
arch/arm/cpu/armv8/start.S, another is defined in the header
boot0-linux-kernel-header.h.

To fix building failure, this patch removes the symbol '_start' from
boot0-linux-kernel-header.h.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
2023-06-01 12:32:03 -04:00
Sam Edwards
719120392f arm: set alignment properly for asm funcs
ARM requires a 4-byte alignment on all ARM code (though this
requirement is relaxed to 2-byte for some THUMB code) and we
should be explicit about that here.

GAS has its own fix for this[1] that forces proper alignment
on any section containing assembled instructions, but this is
not universal: Clang's and other gaslike assemblers lack this
implicit alignment. Whether or not this is considered a bug in
those assemblers, it is better to ask directly for what we want.

[1]: https://sourceware.org/bugzilla/show_bug.cgi?id=12931

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
2023-05-31 17:23:01 -04:00
Jens Wiklander
c8216147a5 arm: use asm-generic/unaligned.h
Arm duplicates the content of asm-generic/unaligned.h, so use that file
directly instead.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-05-31 14:05:34 -04:00
Tom Rini
f1671205fa include: Remove unused header files
As part of various code clean-ups we have on occasion missed removing
unused header files.  None of these files are referenced anywhere else
at this point.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-31 12:31:47 -04:00
Andre Przywara
4ee992f7cf imx: fix header inclusion guards
It seems like the header inclusion guards for some IMX related headers
were misspelled or got out of sync.

Make the preprocessor symbols for the #ifndef and #define lines the
same, so that the double inclusion protection works as expected.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-05-31 10:11:46 -04:00
Tom Rini
41e289bb1f arm: Remove ti816x_evm board and ti816x SoC support
This platform is currently unmaintained and untested, so remove it.
Further, as it is the only TI816X SoC example, remove related files as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-31 10:11:46 -04:00
Tom Rini
6dcee70692 u-boot-imx-20230525
-------------------
 
 - i.MX93 series
 - Fixes
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
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Merge tag 'u-boot-imx-20230525' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20230525
-------------------

- i.MX93 series
- Fixes

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
2023-05-25 14:27:39 -04:00
Jacky Bai
8e81e679db ddr: imx93: update the ddr init to support mult setpoints
Update the DDR init flow for multi-setpoint support on i.MX93. A new
fsp_cfg struct need to be added in the timing file to store the diff
part of the DDRC and DRAM MR register for each setpoint.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Ye Li
662f05fcb6 ddr: imx9: Add workaround for DDRPHY rank-to-rank errata
According to DDRPHY errata, the Rank-to-Rank Spacing and tphy_rdcsgap
specification does not include the Critical Delay Difference (CDD) to
properly define the required rank-to-rank read command spacing after
executing PHY training firmware.

Following the errata workaround, at the end of data training, we get
all CDD values through the MessageBlock, then re-configure the DDRC
timing of WWT/WRT/RRT/RWT with comparing MAX CDD values.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Peng Fan
58da865e27 imx9: add i.MX93 variants support
According to datasheet, iMX93 has fused parts with CORE1 or NPU or
both disabled. So update code to support it, the kernel device tree
runtime update will be added in future patches.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:41 +02:00
Peng Fan
0079893920 imx9: Get market segment and speed grading
Get the chip's market segment and speed grading from fuse and print
them in boot log as other i.MX series.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:40 +02:00
Peng Fan
5d09fcf24d imx9: simplify clk settings
Simplify the clk root settings with an array

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21 16:54:40 +02:00
Peng Fan
99ac6c769f imx: move imx8 sci header file to include/firmware/imx
Move imx8 sci header file to include/firmware/imx, then we could
use build macro to reuse some i.MX8 drivers for i.MX9, such as
drivers/cpu/imx8_cpu.c.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2023-05-21 16:54:32 +02:00
Jonas Karlman
fd6e425be2 rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 5 Model B.

Similar to RK3568 the BootRom in RK3588 can read all data and look for
idbloader at 0x8000, same as on SD and eMMC.

Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The
FIT image is loaded from 0x60000.

  => sf probe
  SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB

  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1492992 bytes read in 129 ms (11 MiB/s)

  => sf update $fileaddr 0 $filesize
  device 0 offset 0x0, size 0x16c800
  1300480 bytes written, 192512 bytes skipped in 11.103s, speed 137694 B/s

The BROM_BOOTSOURCE_ID value read back when booting from SPI flash does
not match the expected value of 3 (SPINOR) used by other SoCs. Instead a
value of 6 is read back, add a new enum value to handle this new
bootsource id.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-19 08:50:44 +08:00
Eugen Hristev
bb52f1c604 reset: rockchip: implement rk3588 lookup table
The current DT bindings for the rk3588 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.

This approach has been implemented already in Linux, by commit :
f1c506d152ff ("clk: rockchip: add clock controller for the RK3588")

Hence, implement a similar approach using the lookup table, and adapt
the existing reset driver to work with SoCs using lookup table.
The file rst-rk3588.c has been copied as much as possible from Linux.

Adapt the clk rk3588 driver as well to bind the reset driver with the
lookup table.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-05-17 17:36:18 +08:00
Dario Binacchi
82863a99c0 imx6: clock: add support to get LCD pixel clock rate
Add the get_lcd_clk() function to get the LCD pixel clock rate.

The patch has been tested on imx6ul platform.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-05-02 10:57:32 +02:00
Samuel Holland
09cbd3858f gpio: axp/sunxi: Remove virtual VBUS detection GPIO
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-28 01:30:24 +01:00
meitao
c1da6fdb5c armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present
u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does.
otherwise it will hang when enable mmu, that is what we encounter
in our SOC.

Signed-off-by: meitao <meitaogao@asrmicro.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3bf38943ae
2023-04-25 15:31:27 -04:00
Marc Zyngier
836b8d4b20 arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.

Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 417a73581a
2023-04-25 15:31:27 -04:00