Commit graph

56613 commits

Author SHA1 Message Date
Kever Yang
f9e8145614 rockchip: rk3399: use grf structure to access reg
Prefer to use structure to access register if we could.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
6a03335714 rockchip: rk3368: move board_debug_uart_init() to rk3368.c
Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
e83e885e53 rockchip: rk3288: add board_debug_uart_init()
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file for all rockchip SoCs later.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
070e48b30e rockchip: rk3288: use grf structure to access soc_con2
Prefer to use structure to access register if we can.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
28fe4d5b30 rockchip: rk322x: move board_debug_uart_init() to rk322x.c
Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed up header-list to not break FASTBOOT:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
86d0eca451 rockchip: rk3188: add board_debug_uart_init()
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
7f3eec03d5 rockchip: rk3036: add board_debug_uart_init()
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed whitespace error:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
2b2ff1bd87 rockchip; kylin-rk3036: enabl DEBUG UART
Enable debug uart for kylin board in defconfig.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:57 +02:00
Kever Yang
b0a569da08 rockchip: enable DEBUG_UART_BOARD_INIT by default
All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board
UART IOMUX, enable it by default.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:06 +02:00
Kever Yang
b1b449bf1f rockchip: correct ARCH_SOC name
The ARCH_SOC name default as 'rockchip' and we put all the
header file in 'arch/arm/include/asm/arch-rockchip/', but
the 'rockchip' is not the SOC name, let's correct it after
we update all the source file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsiich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Kever Yang
15f09a1a83 rockchip: use 'arch-rockchip' as header file path
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Kever Yang
6916dad511 rockchip: arm: use 'arch-rockchip' for common header
rockchip platform header file is in 'arch-rockchip'
instead of arch-$(SOC) for all SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Kever Yang
37dc8aaa18 rockchip: add Kever Yang as co-custodian
This updates MAINTAINERS and git-mailrc to add me as a
co-custodian for rockchip

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Tom Rini <trini@konsulko.com>
2019-05-01 00:00:05 +02:00
Kever Yang
9f09b9d3cc rockchip: arm: remove no use macro
TIMER7_BASE is no used by source code now, remove it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Urja Rannikko
59ef021b99 rk3288-board: remove pinctrl call for debug uart
This failed and caused a boot failure on c201, and afaik
the pins should be setup by the new pinctrl driver.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Urja Rannikko
63402831e0 pinctrl: exit pinconfig_post_bind if there are no subnodes
This fixes RK3288 SPL hanging or hitting this assert:
drivers/core/ofnode.c:183: ofnode_first_subnode: Assertion `ofnode_valid(node)' failed.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Jagan Teki
ed9c9059f2 rockchip: rk3399: Add Orangepi RK3399 support
Add initial support for Orangepi RK3399 board.

Specification
- Rockchip RK3399
- 2GB/4GB DDR3
- 16GB eMMC
- SD card slot
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, DP, MIPI DSI/CSI
- Mini PCIe
- Sensors, Keys etc
- DC12V-2A and DC5V-2A

Commit details about Linux DTS sync:
"arm64: dts: rockchip: Add support for the Orange Pi RK3399"
(sha1: d3e71487a790979057c0fdbf32f85033639c16e6)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Jagan Teki
e05b4a4fa8 rockchip: dts: rk3399: Create initial rk3399-u-boot.dtsi
u-boot,dm-pre-reloc is required for SDMMC booted rk3399 boards and
which is U-Boot specific devicetrees binding.

Move it on global rk3399-u-boot.dtsi file and rest of the U-Boot
bindings will move it future based on the requirement.

This would help to sync the devicetrees from Linux whenever required
instead of adding specific nodes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Jagan Teki
288dbc66da rockchip: dts: rk3399: Sync rk3399-opp from Linux
Sync rk3399-opp.dtsi from Linux.

Linux commit details about the rk3399-opp.dtsi sync:
"arm64: dts: rockchip: use SPDX-License-Identifier"
(sha1: 4ee99cebd486238ac433da823b95cc5f8d8a6905)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
2236149e49 rockchip: spi: make optimised receive-handler unaligned-safe
To support unaligned output buffers (i.e. 'in' in the terminology of
the SPI framework), this change splits each 16bit FIFO element after
reading and writes them to memory in two 8bit transactions.  With this
change, we can now always use the optimised mode for receive-only
transcations independent on the alignment of the target buffer.

Given that we'll run with caches on, the impact should be negligible:
as expected, this has no adverse impact on throughput if running with
a 960MHz LPLL configuration.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
51a644a1b8 rockchip: spi: add driver-data and a 'rxonly_manages_fifo' flag
The SPI controller's documentation (I only had access to the RK3399,
RK3368 and PX30 TRMs) specifies that, when operating in master-mode,
the controller will stop the SCLK to avoid RXFIFO overruns and TXFIFO
underruns.  Looks like my worries that we'd need to support DMA-330
(aka PL330) to make any further progress were unfounded.

This adds a driver-data structure to capture hardware-specific
settings of individual controller instances (after all, we don't know
if all versions are well-behaved) and adds a 'master_manages_fifo'
flag to it.  The first use of said flag is in the optimised
receive-only transfer-handler, which can now request 64Kframe
(i.e. 128KByte) bursts of data on each reprogramming of CTRLR1
(i.e. every time through the loop).

This improves throughput to 46.85MBit/s (a 94.65% bus-utilisation).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
8aa6c921f7 rockchip: spi: add optimised receive-only implementation
For the RK3399-Q7 we recommend storing SPL and u-boot.itb in the
on-module 32MBit (and sometimes even larger, if requested as part of a
configure-to-order configuration) SPI-NOR flash that is clocked for a
bitrate of 49.5MBit/s and connected in a single-IO configuration (the
RK3399 only supports single-IO for SPI).

Unfortunately, the existing SPI driver is excruciatingly slow at
reading out large chunks of data (in fact it is just as slow for small
chunks of data, but the overheads of the driver-framework make it less
noticeable): before this change, the throughput on a 4MB read from
SPI-NOR is 8.47MBit/s which equates a 17.11% bus-utilisation.

To improve on this, this commit adds an optimised receive-only
transfer (i.e.: out == NULL) handler that hooks into the main transfer
function and processes data in 16bit frames (utilising the full with
of each FIFO element).  As of now, the receive-only handler requires
the in-buffer to be 16bit aligned.  Any lingering data (i.e. either if
the in-buffer was not 16-bit aligned or if an odd number of bytes are
to be received) will be handled by the original 8bit reader/wirter.

Given that the SPI controller's documentation does not guarantuee any
interlocking between the RXFIFO and the master SCLK, the transfer loop
will be restarted for each chunk of 32 frames (i.e. 64 bytes).

With this new receive-only transfer handler, the throughput for a 4MB
read increases to 36.28MBit/s (i.e. 73.29% bus-utilisation): this is a
4x improvement over the baseline.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com>

Series-Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Series-Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
7e0e5c552f rockchip: spi: only wait for completion, if transmitting
The logic in the main transmit loop took a bit of reading the TRM to
fully understand (due to silent assumptions based in internal logic):
the "wait until idle" at the end of each iteration through the loop is
required for the transmit-path as each clearing of the ENA register
(to update run-length in the CTRLR1 register) will implicitly flush
the FIFOs... transmisson can therefore not overlap loop iterations.

This change adds a comment to clarify the reason/need for waiting
until the controller becomes idle and wraps the entire check into an
'if (out)' to make it clear that this is required for transfers with a
transmit-component only (for transfers having a receive-component,
completion of the transmit-side is trivially ensured by having
received the correct number of bytes).

The change does not increase execution time measurably in any of my
tests.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
b6101e906f rockchip: spi: consistently use false/true with rkspi_enable_chip
While rkspi_enable_chip is called with true/false everywhere else in
the file, one call site uses '0' to denot 'false'.
This change this one parameter to 'false' and effects consistency.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
e647decdd9 rockchip: spi: fix off-by-one in chunk size computation
The maximum transfer length (in a single transaction) for the Rockchip
SPI controller is 64Kframes (i.e. 0x10000 frames) of 8bit or 16bit
frames and is encoded as (num_frames - 1) in CTRLR1.  The existing
code subtracted the "minus 1" twice for a maximum transfer length of
0xffff (64K - 1) frames.

While this is not strictly an error (the existing code is correct, but
leads to a bit of head-scrating), fix this off-by-one situation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
0e661b6df0 rockchip: spi: remove unused code and fields in priv
Even though the priv-structure and the claim-bus function contain
logic for 16bit frames and for unidirectional transfer modes, neither
of these is used anywhere in the driver.

This removes the unused (as in "has no effect") logic and fields.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
f92cf0adca rockchip: spi: add debug message for delay in CS toggle
In analysing delays introduced for large SPI reads, the absence of any
indication when a delay was inserted (to ensure the CS toggling is
observed by devices) became apparent.

Add an additional debug-only debug message to record the insertion and
duration of any delay (note that the debug-message will cause a delay
on-top of the delay-duration).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:04 +02:00
Philipp Tomsich
4abf5d0c02 rockchip: rk3399-puma: support Gigadevice SPI-NOR flash
Over the last quarter, a part of our production has used NOR flash
from Gigadevice in addition to the Winbond parts that we typically
source.  This requires the SPI_FLASH_GIGADEVICE config to be set.

Enable SPI_FLASH_GIGADEVICE in the board's default defconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2019-05-01 00:00:03 +02:00
Tom Rini
a69120a0d7 Prepare v2019.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29 21:54:04 -04:00
Simon Goldschmidt
f89d6133ee configs: move CONFIG_SPL_TEXT_BASE to Kconfig
Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing
values.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Re-run migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29 21:41:40 -04:00
Tom Rini
d168bcb6fe configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29 21:41:40 -04:00
Tom Rini
6aebc0d11a Revert "fs: btrfs: fix false negatives in ROOT_ITEM search"
Per Pierre this change shouldn't have been applied as it was superseded
by "fs: btrfs: fix btrfs_search_tree invalid results" which is also
applied now as 1627e5e598.

This reverts commit 633967f981.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-27 11:35:44 -04:00
Tom Rini
6b8e57338f Merge branch '2019-04-27-master-imports'
- Various vexpress, taurus, da850evm, lpc32xx, brxre1 fixes/updates
- btrfs fixes
- Add AM65x HS EVM
- Other small fixes
2019-04-27 10:42:36 -04:00
Igor Opaniuk
fc1fe01b08 avb: add support for named persistent values
AVB 2.0 spec. revision 1.1 introduces support for named persistent values
that must be tamper evident and allows AVB to store arbitrary key-value
pairs [1].

Introduce implementation of two additional AVB operations
read_persistent_value()/write_persistent_value() for retrieving/storing
named persistent values.

Correspondent pull request in the OP-TEE OS project repo [2].

[1]: https://android.googlesource.com/platform/external/avb/+/android-9.0.0_r22
[2]: https://github.com/OP-TEE/optee_os/pull/2699

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2019-04-26 18:58:22 -04:00
Heinrich Schuchardt
b85d155199 arm: dts: add missing vexpress device trees
Add the device trees for

* vexpress_ca5x2_defconfig
* vexpress_ca9x4_defconfig
* vexpress_ca15_tc2_defconfig

as available in Linux 5.1 rc5.

We are using the vexpress_ca15_tc2_defconfig and vexpress_ca9x4_defconfig
for Travis testing via QEMU.

The UEFI base Embedded Base Boot Requirements Specification (EBBR) requires
that an embedded board either provides a device tree or an ACPI table.

All block devices are meant to be moved to the driver model. On ARM this
requires a device tree.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-04-26 18:58:22 -04:00
Patrick Delaunay
50fd31fd77 sysreset: syscon: remove POWER reset cause
The sysreset of 'POWER' type is a PMIC reset defined as
'remove and restore power'.
So normally only COLD/WARN is supported by sysreset_syscon.

This modification allows to use the function sysreset_walk(SYSRESET_POWER)
when it is supported by PMIC driver (see example in stpmic1).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-26 18:58:22 -04:00
Robert P. J. Day
9ad996adcc doc: delete long-obsolete README.ARM-memory-map
As far back as 2011, "_armboot_start" was being described as "no
longer defined":

 commit 297f18ac0f
 Author: Greg Ungerer <greg.ungerer@opengear.com>
 Date:   Fri Sep 9 22:23:34 2011 +1000

   CM4000: fix broken flash base for OpenGear boards

   Use _bss_start_ofs as the size of the boot loader code+data that we want
   to protect in the flash. This replaces use of the no longer defined
   _armboot_start.
2019-04-26 18:58:22 -04:00
Baruch Siach
71d8e1b829 .gitignore: Ignore .log files
The generated flash.log file that mach-imx uses for MKIMAGEOUTPUT is not
covered by any other ignore pattern. Ignore all *.log files.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-26 18:58:21 -04:00
Adam Ford
cd2d8245ac ARM: da850evm: Fix TI boot scripts for MMC
The da850evm include environment/ti/mmc.h and places
DEFAULT_MMC_TI_ARGS, defined int that file, in
CONFIG_EXTRA_ENV_SETTINGS.  This has been broken for some time
since neither CMD_PART nor CMD_UUID are available, so manually
changing the environmental variables was always required before
booting from MMC. With this patch, these scripts should work
again, and by default they point to mmc 0, partition 2, and
the dtb file exists in a /boot directory on partition 2.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-04-26 18:58:21 -04:00
Adam Ford
fd3c26f3f9 ARM: da850evm: Fix broken SPI Flash
A previous patch converted a bunch of settings for CONFIG_SF_DEFAULT
but it broke the SPI Flash which now prevents booting.  This patch
now correctly sets CONFIG_SF_DEFAULT_SPEED=30000000 to match what it
was before the conversion.

Fixes: 14453fbfad ("Convert CONFIG_SF_DEFAULT_* to Kconfig")

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-04-26 18:58:21 -04:00
Björn Stenberg
2b4ea2b344 fw_env: Fix double free
addr0 is being freed twice, leading to segmentation fault

Signed-off-by: Björn Stenberg <bjorn@haxx.se>
2019-04-26 18:58:21 -04:00
Gregory CLEMENT
c8aac24629 arm: lpc32xx: Fix timer initialization
The match controller register is not cleared during
initialization. However, some bits of this register may reset the TC if
tnMRx match it.

As we can't make any assumption about how U-Boot is launched by the first
stage bootloader (such as S1L) clearing this register ensure that the
timers work as expected.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-04-26 18:58:20 -04:00
Gregory CLEMENT
32dfc12b70 net: lpc32xx: Use IRAM for transmit buffer
Since the introduction of the driver, some memory in IRAM is reserved for
the TX buffers.

However there are not used but instead of it, it is the buffer provided
by the net stack which is used. As stated in the comment of the driver,
not using the IRAM buffer could cause cache issue and lower the
throughput.

For the second argument it is less the case for transmitting buffers
because the throughput gain in IRAM is mitigated by the time to copy the
data from RAM to IRAM, but the first argument is still valid and indeed
this patch fixes issue seen with Ethernet on some boards

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-04-26 18:58:20 -04:00
Gregory CLEMENT
5f626e7849 mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior
The purpose of "mtd: nand: raw: allow to disable unneeded ECC layouts"
was to allow disabling the default ECC layouts if a driver is known to
provide its own ECC layout. However, this commit did the opposite and
disabled the default layout when it was _not_ selected.

It breaks all the NAND drivers not providing their own ECC layout this
patch fix this situation.

It was tested with the lpc32xx_nand_slc driver.

Fixes: a38c3af868 ("mtd: nand: raw: allow to disable unneeded ECC layouts")
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-26 18:58:20 -04:00
Heiko Schocher
e9cde87ec1 dtb_platdata.py: prevent define generation of alias
generate define for an alias only if the struct is not
created already.

This prevents compilerwarning:
  PLAT    spl/dts/dt-platdata.o
spl/dts/dt-platdata.c:11:46: error: missing braces around initializer [-Werror=missing-braces]
 static const struct dtd_simple_bus dtv_ahb = {
                                              ^
spl/dts/dt-platdata.c:20:46: error: missing braces around initializer [-Werror=missing-braces]
 static const struct dtd_simple_bus dtv_apb = {
                                              ^
cc1: all warnings being treated as errors

on the at91 based taurus board. Reason is in at91sam9260.dtsi
is defined:

ahb {
        compatible = "simple-bus";
        ranges;

and later:

pinctrl: pinctrl@fffff400 {
        compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
        ranges = <0xfffff400 0xfffff400 0x600>;

without this patch dtoc generates:

struct dtd_atmel_at91rm9200_pinctrl {
	fdt32_t		atmel_mux_mask[6];
	fdt32_t		ranges[3];
	fdt32_t		reg[6];
};

struct dtd_simple_bus {
        bool            ranges;
};

"#define dtd_simple_bus dtd_atmel_at91rm9200_pinctrl"

and the line with "define dtd_simple_bus..." introduces
the warning. This define is not needed.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-04-26 18:58:20 -04:00
Pierre Bourdon
1627e5e598 fs: btrfs: fix btrfs_search_tree invalid results
btrfs_search_tree should return the first item in the tree that is
greater or equal to the searched item.

The search algorithm did not properly handle the edge case where the
searched item is higher than the last item of the node but lower than
the first item of the next node. Instead of properly returning the first
item of the next node, it was returning an invalid path pointer
(pointing to a non-existent item after the last item of the node + 1).

This fixes two issues in the btrfs driver:
  - Looking for a ROOT_ITEM could fail if it was the first item of its
    leaf node.
  - Iterating through DIR_INDEX entries (for readdir) could fail if the
    first DIR_INDEX entry was the first item of a leaf node.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Marek Behun <marek.behun@nic.cz>
2019-04-26 17:53:16 -04:00
Ismael Luceno Cortes
423eba241d fs: fat: Build only if CONFIG_FS_FAT=y
Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
2019-04-26 17:53:16 -04:00
Pierre Bourdon
633967f981 fs: btrfs: fix false negatives in ROOT_ITEM search
ROOT_ITEMs in btrfs are referenced without knowing their actual "offset"
value. To perform these searches using only two items from the key, the
btrfs driver uses a special "btrfs_search_tree_key_type" function.

The algorithm used by that function to transform a 3-tuple search into a
2-tuple search was subtly broken, leading to items not being found if
they were the first in their tree node.

This commit fixes btrfs_search_tree_key_type to properly behave in these
situations.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Marek Behun <marek.behun@nic.cz>
2019-04-26 17:53:15 -04:00
Andrew F. Davis
74ee9dc502 doc: Update info on using K3 secure devices
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
2019-04-26 17:51:51 -04:00
Andrew F. Davis
0a4b11b027 configs: Add configs for AM65x High Security EVM
Add new defconfig files for the AM65x High Security EVM.

This defconfigs are the same as for the non-secure part, except for:
    CONFIG_TI_SECURE_DEVICE option set to 'y'
    CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
    CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y'

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
2019-04-26 17:51:51 -04:00