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rockchip: spi: fix off-by-one in chunk size computation

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The maximum transfer length (in a single transaction) for the Rockchip
SPI controller is 64Kframes (i.e. 0x10000 frames) of 8bit or 16bit
frames and is encoded as (num_frames - 1) in CTRLR1.  The existing
code subtracted the "minus 1" twice for a maximum transfer length of
0xffff (64K - 1) frames.

While this is not strictly an error (the existing code is correct, but
leads to a bit of head-scrating), fix this off-by-one situation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This commit is contained in:
Philipp Tomsich 2019-02-03 16:17:28 +01:00
parent 0e661b6df0
commit e647decdd9
1 changed files with 1 additions and 1 deletions
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2
drivers/spi/rk_spi.c
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@ -356,7 +356,7 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen,
spi_cs_activate(dev, slave_plat->cs);
while (len > 0) {
int todo = min(len, 0xffff);
int todo = min(len, 0x10000);
rkspi_enable_chip(regs, false);
writel(todo - 1, &regs->ctrlr1);