Commit graph

20187 commits

Author SHA1 Message Date
Lad Prabhakar
9e346340d7 board: silinux: Enable recovery SPL for EK874 board
Enable building SPL for EK874 board which is based on R8A774C0 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:30 +01:00
Lad Prabhakar
07148c1899 arm: rmobile: Add Silicon Linux EK874 board support
The EK874 development kit from Silicon Linux is made of CAT874 (the main
board) and CAT875 (the sub board that goes on top of CAT874).

This patch adds the required board support to boot Si-Linux EK874 board
based on R8A774C0 SoC.

DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi
have been imported from Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Lad Prabhakar
220f308a5c pinctrl: renesas: Add support for R8A774C0
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car
E3 (a.k.a. r8a77990), however it doesn't have several automotive
specific peripherals.

This patch hooks R8A774C0 SoC with the pfc driver.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Lad Prabhakar
6180db6e56 arm: dts: r8a774c0: Resync R8A774C0 SoC DTSI with Linux 5.11
Resync the R8A774C0 SoC DTSI with Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
5be85de6a8 arm: rmobile: Add HopeRun HiHope RZ/G2H board support
The HiHope RZ/G2H board from HopeRun consists of main board
(HopeRun HiHope RZ/G2H main board) and sub board(HopeRun
HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits
below the HiHope RZ/G2H main board.

This patch adds the required board support to boot HopeRun HiHope
RZ/G2H board.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
dca070c382 arm: rmobile: Add HopeRun HiHope RZ/G2N board support
The HiHope RZ/G2N board from HopeRun consists of main board
(HopeRun HiHope RZ/G2N main board) and sub board(HopeRun
HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits
below the HiHope RZ/G2N main board.

This patch adds the required board support to boot HopeRun HiHope
RZ/G2N board.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
b650c83825 arm: rmobile: Add HopeRun HiHope RZ/G2M board support
The HiHope RZ/G2M board from HopeRun consists of main board
(HopeRun HiHope RZ/G2M main board) and sub board(HopeRun
HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits
below the HiHope RZ/G2M main board.

This patch adds the required board support to boot HopeRun HiHope
RZ/G2M board.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
40ac794524 arm: dts: rmobile: r8a774e1: Synchronize DTs with Linux 5.11
Synchronize r8a774e1 device trees with Linux 5.11,
commit f40ddce88593482919 ("Linux 5.11").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
2141203f58 arm: dts: rmobile: r8a774b1: Synchronize DTs with Linux 5.11
Synchronize r8a774b1 device trees with Linux 5.11,
commit f40ddce88593482919 ("Linux 5.11")

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Tom Rini
22fc991daf Prepare v2021.04-rc4
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Merge tag 'v2021.04-rc4' into next

Prepare v2021.04-rc4
2021-03-15 12:15:38 -04:00
Tom Rini
e8a10a02bd - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
 - Remove the nand MTD configuration for NOR boot in stm32mp1 board
 - STM32programmer update
 - Bsec: manage clock when present in device tree
 - stm32mp15: move bootdelay configuration in defconfig
 - Update for stm32 dsi and dw_mipi_dsi
 - STM32 MCU's cleanup
 - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
 - Update stm32mp1 doc
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Merge tag 'u-boot-stm32-20210312' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
2021-03-15 08:43:19 -04:00
Igor Opaniuk
7c591a841c sandbox: imply SCP03 and CMD_SCP03
Enable by default SCP_03/CMD_SCP03 for sandbox target.

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-14 11:50:16 -04:00
Simon Glass
01ad9f75c5 sandbox: Update os_find_u_boot() to find the .img file
At present this function can only locate the u-boot ELF file. For SPL it
is handy to be able to locate u-boot.img since this is what would normally
be loaded by SPL.

Add another argument to allow this to be selected.

While we are here, update the function to load SPL when running in TPL,
since that is the next stage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:31 -05:00
Simon Glass
8482356f48 test: Allow SPL to run any available test
At present SPL only runs driver model tests. Update it to run all
available tests, i.e. in any test suite.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:31 -05:00
Simon Glass
409f4a2a72 test: Rename test-main.c to test-dm.c
This is the main test function for driver model but not for other tests.
Rename the file and the function so this is clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:29 -05:00
Simon Glass
bef1b28335 sandbox: Drop the 'starting...' message
This message is annoying since it is only useful for testing. Drop it and
update the test to cope.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:29 -05:00
Patrice Chotard
23e20b2fa6 arm: stm32mp: Fix compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled
Fix following compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS
are enabled :

arch/arm/mach-stm32mp/cpu.c: In function ‘early_enable_caches’:
arch/arm/mach-stm32mp/cpu.c:223:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_size’
  223 |  gd->arch.tlb_size = PGTABLE_SIZE;
      |          ^
arch/arm/mach-stm32mp/cpu.c:224:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’
  224 |  gd->arch.tlb_addr = (unsigned long)&early_tlb;
      |          ^

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-12 10:58:55 +01:00
Pali Rohár
15942805b7 arm: mvebu: a38x: Remove dead code ARMADA_39X
Config option ARMADA_39X is never set so remove all dead code hidden under
ifdef CONFIG_ARMADA_39X blocks.

Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
always defined for a38x code path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12 07:44:21 +01:00
Patrick Delaunay
622c956cad stm32mp: bsec: manage clock when present in device tree
Enable the clocks during bsec probe when they are present in device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:50:10 +01:00
Patrick Delaunay
f49eb16c17 stm32mp: stm32prog: replace alias by serial device sequence number
The command "stm32prog serial <dev>" can directly use the device sequence
number of serial uclass as this sequence number is egual to alias when it
exist; this assumption simplify the code and avoid access to gd->fdt_blob
and the device tree parsing.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:41:17 +01:00
Patrick Delaunay
b9d5e3aa8f stm32mp: stm32prog: reactivate console and display serial error
When serial instance is not found in device tree, the console
should be enabled and the error should be indicated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:41:17 +01:00
Patrick Delaunay
5a05af87ef stm32mp: stm32prog: Add CONFIG_CMD_STM32PROG_SERIAL and _USB
Add CONFIG_CMD_STM32PROG_SERIAL and CONFIG_CMD_STM32PROG_USB to
independently select the support of UART or USB communication for
STM32CubeProgrammer.

For serial boot over UART, user can deactivate CONFIG_CMD_STM32PROG_SERIAL
to use U-Boot console of binary loaded by UART (for board bring-up for
example).

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:41:17 +01:00
Patrick Delaunay
2dc2216692 stm32mp: stm32prog: Add Kconfig file for stm32prog command
Move CONFIG_CMD_STM32PROG in a specific Kconfig file for stm32prog command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:41:17 +01:00
Etienne Carriere
3d15245502 ARM: dts: stm32mp1: explicit clock reference needed by RCC clock driver
Define in the RCC clock provider node which root clocks the driver
depends on. These are root oscillators, which may be present or
not, upon FDT content.

This update binding is introduced in Linux kernel device tree by patch
"ARM: dts: stm32: move clocks/resets to SCMI resources for stm32mp15"

This patch is a preliminary step for SCMI support of stm32mp15
boards with trusted boot chain, based on TF-A or OP-TEE.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:03:19 +01:00
Simon Glass
736ecc643d x86: Select advanced Intel code only if allowed
At present most of the Intel-specific code is built on all devices, even
those which don't have software support for the features provided there.

This means that any board can enable CONFIG_INTEL_ACPIGEN even if it does
not have the required features.

Add a new INTEL_SOC option to control this access. This must be selected
by SoCs that can support the required features.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09 09:42:12 +08:00
Simon Glass
049c4dc677 x86: Move INTEL_ACPIGEN to arch/x86
This option is better placed in the x86 code since it is not generic
enough to be in the core code. Move it.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09 09:42:12 +08:00
Simon Glass
0b823e16b6 x86: Fix member check in intel_gnvs
When CONFIG_CHROMEOS is not enabled this currently does not build. Fix it.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09 09:42:12 +08:00
Heinrich Schuchardt
97401d0dbc x86: sizeof-array-div error in lpc_common_early_init
Building qemu-x86_64_defconfig with GCC 11.0 fails with:

arch/x86/cpu/intel_common/lpc.c:
In function ‘lpc_common_early_init’:
arch/x86/cpu/intel_common/lpc.c:56:40:
error: expression does not compute the number of elements in this array;
element type is ‘struct reg_info’, not ‘u32’ {aka ‘unsigned int’}
[-Werror=sizeof-array-div]
   56 |                         sizeof(values) / sizeof(u32));
      |                                        ^
arch/x86/cpu/intel_common/lpc.c:56:40: note: add parentheses around the
second ‘sizeof’ to silence this warning
arch/x86/cpu/intel_common/lpc.c:50:11: note: array ‘values’ declared here
   50 |         } values[4], *ptr;
      |           ^~~~~~

Add parentheses to silence warning.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09 09:42:12 +08:00
Siew Chin Lim
ae99131bf4 arm: socfpga: dts: soc64: Update filename in binman node of FIT image with VAB support
FIT image of Vendor Authentication Coot (VAB) contains signed images.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:10 +08:00
Siew Chin Lim
1025b530a9 arm: socfpga: cmd: Support 'vab' command
Support 'vab' command to perform vendor authentication.

Command format: vab addr len
Authorize 'len' bytes starting at 'addr' via vendor public key

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:10 +08:00
Siew Chin Lim
1bc20897c1 arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
Vendor Authorized Boot is a security feature for authenticating
the images such as U-Boot, ARM trusted Firmware, Linux kernel,
device tree blob and etc loaded from FIT. After those images are
loaded from FIT, the VAB certificate and signature block appended
at the end of each image are sent to Secure Device Manager (SDM)
for authentication. U-Boot will validate the SHA384 of the image
against the SHA384 hash stored in the VAB certificate before
sending the image to SDM for authentication.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-03-08 10:59:10 +08:00
Siew Chin Lim
9a5bbdfd1a arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:10 +08:00
Bin Meng
1d636a0cd5 ppc: qemu: Move board directory from board/freescale to board/emulation
board/emulation is the place for other QEMU targets like x86, arm,
riscv. Let's move the qemu-ppce500 board codes there.

List me as a co-maintainer for this board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:44 +05:30
Bin Meng
271a87b4ec gpio: mpc8xxx: Support controller register physical address beyond 32-bit
dev_read_addr_size_index() returns fdt_addr_t which might be a
64-bit physical address. This might be true for some 85xx SoCs
whose CCSBAR is mapped beyond 4 GiB.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
f94cbb5b87 ppc: mpc85xx: Add 'gpibe' register to 'struct ccsr_gpio'
Without this, the DM GPIO driver for MPC8xxx does not compile for
MPC85xx SoCs.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
3320656944 ppc: io.h: Use addrmap_ translation APIs only in post-relocation phase
In phys_to_virt() and virt_to_phys(), if CONFIG_ADDR_MAP is defined,
they use addrmap_ translation APIs to do the address translation.
However these APIs only work in post-relocation phase.

Update the code logic to fall back to use the default one when in
pre-relocation phase.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
907568e895 ppc: mpc85xx: Wrap LAW related codes with CONFIG_FSL_LAW
LAW related codes should be wrapped with CONFIG_FSL_LAW.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:42 +05:30
Rajesh Bhagat
c8c0170f19 configs: fsl: move via specific defines to Kconfig
Moves below via specific defines to Kconfig:

	CONFIG_FSL_VIA

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:41 +05:30
Rajesh Bhagat
504debcd8c configs: fsl: move bootrom specific defines to Kconfig
Moves below bootrom specific defines to Kconfig:

    CONFIG_SYS_FSL_BOOTROM_BASE
    CONFIG_SYS_FSL_BOOTROM_SIZE

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:41 +05:30
Tom Rini
668866aa24 - convert sunxi_display to DM_VIDEO
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Merge tag 'next-2021-03-04' of https://gitlab.denx.de/u-boot/custodians/u-boot-video into next

 - convert sunxi_display to DM_VIDEO
2021-03-04 14:36:40 -05:00
Simon Glass
8a45b22057 gpio: Add a way to read 3-way strapping pins
Using the internal vs. external pull resistors it is possible to get
27 different combinations from 3 strapping pins. Add an implementation
of this.

This involves updating the sandbox GPIO driver to model external and
(weaker) internal pull resistors. The get_value() method now takes account
of what is driving a pin:

   sandbox: GPIOD_EXT_DRIVEN - in which case GPIO_EXT_HIGH provides the
          value
   outside source - in which case GPIO_EXT_PULL_UP/DOWN indicates the
          external state and we work the final state using those flags and
          the internal GPIOD_PULL_UP/DOWN flags

Of course the outside source does not really exist in sandbox. We are just
modelling it for test purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-03 15:40:47 -05:00
Simon Glass
d638a18357 gpio: sandbox: Track whether a GPIO is driven
Add a new flag to keep track of whether sandbox is driving the pin, or
whether it is expecting an input signal. If it is driving, then the value
of the pin is the value being driven (0 or 1). If not driving, then we
consider the value 0, since we don't currently handle things like pull-ups
yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-03 15:40:11 -05:00
Simon Glass
edab114775 gpio: x86: Drop the deprecated methods in intel_gpio
We don't need to implement direction_input() and direction_output()
anymore. Drop them and use update_flags() instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-03 15:40:11 -05:00
Simon Glass
1f212afc4c gpio: sandbox: Use a separate flag for the value
At present with the sandbox GPIO driver it is not possible to change the
value of GPIOD_IS_OUT_ACTIVE unless the GPIO is an output. This makes it
hard to test changing the flags since we need to be aware of the internal
workings of the driver.

The feature is designed to aid testing.

Split this feature out into a separate sandbox-specific flag, so that the
flags can change unimpeded. This will make it easier to allow updating the
flags in a future patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-03 15:38:58 -05:00
Simon Glass
a03a0aa7e8 gpio: sandbox: Rename GPIO dir_flags to flags
Adjust the terminology in this driver to reflect that fact that all flags
are handled, not just direction flags.

Create a new access function to get the full GPIO state, not just the
direction flags. Drop the static invalid_dir_flags since we can rely on a
segfault if something is wrong.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-03 15:38:58 -05:00
Tom Rini
52ba373b78 i.MX for 2021.04
----------------
 
 - new boards:
 	- i.MX8MN Beacon EmbeddedWorks (2GB)
 	- Gateworks Venice imx8mm
 - convert to DM:
 	- imx53-qsb, mx53loco, mx51evk, mx23-evk
 - Fixes :
 	- Network : FEC ethernet quirks
 	- DH dh-imx6
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
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Merge tag 'u-boot-imx-20210303' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

i.MX for 2021.04
----------------

- new boards:
	- i.MX8MN Beacon EmbeddedWorks (2GB)
	- Gateworks Venice imx8mm
- convert to DM:
	- imx53-qsb, mx53loco, mx51evk, mx23-evk
- Fixes :
	- Network : FEC ethernet quirks
	- DH dh-imx6

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
2021-03-03 10:10:34 -05:00
Tim Harvey
03bf8436a3 board: gateworks: imx8mm: Add Gateworks Venice board support
Add initial support for Gateworks Venice product family based on the
i.MX 8M Mini SoC

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-03-03 14:15:02 +01:00
Tim Harvey
5db93abe33 arm: dts: imx8mm: add Gateworks i.MX8 Mini Dev kits
Add Gateworks i.MX 8M Mini Development kits from Linux-5.12-rc1

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-03-03 14:15:02 +01:00
Jagan Teki
5d235324ae video: sunxi_display: Convert to DM_VIDEO
DM_VIDEO migration deadline is already expired, but around
80 Allwinner boards are still using video in a legacy way:

===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

Convert the legacy video driver over to the DM_VIDEO framework. This is
a minimal conversion: it doesn't use the DT for finding its resources,
nor does it use DM clocks or DM devices for the outputs (LCD, HDMI, CVBS).

Tested in Bananapi M1+ Plus 1920x1200 HDMI out. (Jagan)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: rebase and smaller fixes]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-03 10:03:15 +01:00
Pali Rohár
50ef3851b8 arm: omap3: Compile s_init() function only when it is used
Function s_init() is called only from lowlevel_init(). So compile it only
when function lowlevel_init() is compiled.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
2021-03-03 04:12:46 +01:00