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- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver

Browse source 
- stm32mp1_trusted_defconfig rely on SCMI support
 - Remove the nand MTD configuration for NOR boot in stm32mp1 board
 - STM32programmer update
 - Bsec: manage clock when present in device tree
 - stm32mp15: move bootdelay configuration in defconfig
 - Update for stm32 dsi and dw_mipi_dsi
 - STM32 MCU's cleanup
 - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
 - Update stm32mp1 doc
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Merge tag 'u-boot-stm32-20210312' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
This commit is contained in:
Tom Rini 2021-03-15 08:43:19 -04:00
commit e8a10a02bd
45 changed files with 195 additions and 179 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/arm/dts/stm32mp151.dtsi
View file

@ -1136,6 +1136,10 @@
reg = <0x50000000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
clock-names = "hse", "hsi", "csi", "lse", "lsi";
clocks = <&clk_hse>, <&clk_hsi>, <&clk_csi>,
<&clk_lse>, <&clk_lsi>;
};
pwr_regulators: pwr@50001000 {

18
arch/arm/mach-stm32mp/Kconfig
View file

@ -121,23 +121,6 @@ config STM32_ETZPC
help
Say y to enable STM32 Extended TrustZone Protection
config CMD_STM32PROG
bool "command stm32prog for STM32CudeProgrammer"
select DFU
select DFU_RAM
select DFU_VIRT
select PARTITION_TYPE_GUID
imply CMD_GPT if MMC
imply CMD_MTD if MTD
imply DFU_MMC if MMC
imply DFU_MTD if MTD
help
activate a specific command stm32prog for STM32MP soc family
witch update the device with the tools STM32CubeProgrammer,
using UART with STM32 protocol or USB with DFU protocol
NB: access to not volatile memory (NOR/NAND/SD/eMMC) is based
on U-Boot DFU framework
config CMD_STM32KEY
bool "command stm32key to fuse public key hash"
default y
@ -177,6 +160,7 @@ config DEBUG_UART_CLOCK
default 64000000
endif
source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
source "board/st/stm32mp1/Kconfig"
source "board/dhelectronics/dh_stm32mp1/Kconfig"

2
arch/arm/mach-stm32mp/Makefile
View file

@ -11,7 +11,7 @@ obj-y += bsec.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
else
obj-$(CONFIG_CMD_STM32PROG) += cmd_stm32prog/
obj-y += cmd_stm32prog/
obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o
obj-$(CONFIG_ARMV7_PSCI) += psci.o
obj-$(CONFIG_TFABOOT) += boot_params.o

10
arch/arm/mach-stm32mp/bsec.c
View file

@ -6,6 +6,7 @@
#define LOG_CATEGORY UCLASS_MISC
#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
#include <misc.h>
@ -490,6 +491,15 @@ static int stm32mp_bsec_probe(struct udevice *dev)
{
int otp;
struct stm32mp_bsec_plat *plat;
struct clk_bulk clk_bulk;
int ret;
ret = clk_get_bulk(dev, &clk_bulk);
if (!ret) {
ret = clk_enable_bulk(&clk_bulk);
if (ret)
return ret;
}
/*
* update unlocked shadow for OTP cleared by the rom code

34
arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig Normal file
View file

@ -0,0 +1,34 @@
config CMD_STM32PROG
bool "command stm32prog for STM32CudeProgrammer"
select DFU
select DFU_RAM
select DFU_VIRT
select PARTITION_TYPE_GUID
imply CMD_GPT if MMC
imply CMD_MTD if MTD
imply DFU_MMC if MMC
imply DFU_MTD if MTD
help
activate a specific command stm32prog for STM32MP soc family
witch update the device with the tools STM32CubeProgrammer
NB: access to not volatile memory (NOR/NAND/SD/eMMC) is based
on U-Boot DFU framework
config CMD_STM32PROG_USB
bool "support stm32prog over USB"
depends on CMD_STM32PROG
default y
help
activate the command "stm32prog usb" for STM32MP soc family
witch update the device with the tools STM32CubeProgrammer,
using USB with DFU protocol
config CMD_STM32PROG_SERIAL
bool "support stm32prog over UART"
depends on CMD_STM32PROG
default y
help
activate the command "stm32prog serial" for STM32MP soc family
with the tools STM32CubeProgrammer using U-Boot serial device
and UART protocol.

8
arch/arm/mach-stm32mp/cmd_stm32prog/Makefile
View file

@ -3,7 +3,7 @@
# Copyright (C) 2020, STMicroelectronics - All Rights Reserved
#
obj-y += cmd_stm32prog.o
obj-y += stm32prog.o
obj-y += stm32prog_serial.o
obj-y += stm32prog_usb.o
obj-$(CONFIG_CMD_STM32PROG) += cmd_stm32prog.o
obj-$(CONFIG_CMD_STM32PROG) += stm32prog.o
obj-$(CONFIG_CMD_STM32PROG_SERIAL) += stm32prog_serial.o
obj-$(CONFIG_CMD_STM32PROG_USB) += stm32prog_usb.o

4
arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
View file

@ -50,9 +50,9 @@ static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, int argc,
if (argc < 3 || argc > 5)
return CMD_RET_USAGE;
if (!strcmp(argv[1], "usb"))
if (IS_ENABLED(CONFIG_CMD_STM32PROG_USB) && !strcmp(argv[1], "usb"))
link = LINK_USB;
else if (!strcmp(argv[1], "serial"))
else if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && !strcmp(argv[1], "serial"))
link = LINK_SERIAL;
if (link == LINK_UNDEFINED) {

27
arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
View file

@ -177,9 +177,30 @@ char *stm32prog_get_error(struct stm32prog_data *data);
/* Main function */
int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size);
int stm32prog_serial_init(struct stm32prog_data *data, int link_dev);
bool stm32prog_serial_loop(struct stm32prog_data *data);
bool stm32prog_usb_loop(struct stm32prog_data *data, int dev);
void stm32prog_clean(struct stm32prog_data *data);
#ifdef CONFIG_CMD_STM32PROG_SERIAL
int stm32prog_serial_init(struct stm32prog_data *data, int link_dev);
bool stm32prog_serial_loop(struct stm32prog_data *data);
#else
static inline int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
{
return -ENOSYS;
}
static inline bool stm32prog_serial_loop(struct stm32prog_data *data)
{
return false;
}
#endif
#ifdef CONFIG_CMD_STM32PROG_USB
bool stm32prog_usb_loop(struct stm32prog_data *data, int dev);
#else
static inline bool stm32prog_usb_loop(struct stm32prog_data *data, int dev)
{
return false;
}
#endif
#endif

29
arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
View file

@ -187,36 +187,19 @@ static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
{
struct udevice *dev = NULL;
int node;
char alias[10];
const char *path;
struct dm_serial_ops *ops;
/* no parity, 8 bits, 1 stop */
u32 serial_config = SERIAL_DEFAULT_CONFIG;
down_serial_dev = NULL;
sprintf(alias, "serial%d", link_dev);
path = fdt_get_alias(gd->fdt_blob, alias);
if (!path) {
log_err("%s alias not found", alias);
return -ENODEV;
}
node = fdt_path_offset(gd->fdt_blob, path);
if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node,
&dev)) {
down_serial_dev = dev;
} else if (node > 0 &&
!lists_bind_fdt(gd->dm_root, offset_to_ofnode(node),
&dev, false)) {
if (!device_probe(dev))
down_serial_dev = dev;
}
if (!down_serial_dev) {
log_err("%s = %s device not found", alias, path);
if (uclass_get_device_by_seq(UCLASS_SERIAL, link_dev, &dev)) {
log_err("serial %d device not found\n", link_dev);
return -ENODEV;
}
down_serial_dev = dev;
/* force silent console on uart only when used */
if (gd->cur_serial_dev == down_serial_dev)
gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
@ -226,11 +209,11 @@ int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
ops = serial_get_ops(down_serial_dev);
if (!ops) {
log_err("%s = %s missing ops", alias, path);
log_err("serial %d = %s missing ops\n", link_dev, dev->name);
return -ENODEV;
}
if (!ops->setconfig) {
log_err("%s = %s missing setconfig", alias, path);
log_err("serial %d = %s missing setconfig\n", link_dev, dev->name);
return -ENODEV;
}

28
arch/arm/mach-stm32mp/cpu.c
View file

@ -223,8 +223,10 @@ static void early_enable_caches(void)
if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
return;
gd->arch.tlb_size = PGTABLE_SIZE;
gd->arch.tlb_addr = (unsigned long)&early_tlb;
if (!(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))) {
gd->arch.tlb_size = PGTABLE_SIZE;
gd->arch.tlb_addr = (unsigned long)&early_tlb;
}
dcache_enable();
@ -265,7 +267,8 @@ int arch_cpu_init(void)
boot_mode = get_bootmode();
if ((boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART)
if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) &&
(boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART)
gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
#if defined(CONFIG_DEBUG_UART) && \
!defined(CONFIG_TFABOOT) && \
@ -465,7 +468,6 @@ static void setup_boot_mode(void)
unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
u32 forced_mode = (boot_ctx & TAMP_BOOT_FORCED_MASK);
struct udevice *dev;
int alias;
log_debug("%s: boot_ctx=0x%x => boot_mode=%x, instance=%d forced=%x\n",
__func__, boot_ctx, boot_mode, instance, forced_mode);
@ -473,19 +475,23 @@ static void setup_boot_mode(void)
case BOOT_SERIAL_UART:
if (instance > ARRAY_SIZE(serial_addr))
break;
/* serial : search associated alias in devicetree */
/* serial : search associated node in devicetree */
sprintf(cmd, "serial@%x", serial_addr[instance]);
if (uclass_get_device_by_name(UCLASS_SERIAL, cmd, &dev))
if (uclass_get_device_by_name(UCLASS_SERIAL, cmd, &dev)) {
/* restore console on error */
if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL))
gd->flags &= ~(GD_FLG_SILENT |
GD_FLG_DISABLE_CONSOLE);
printf("uart%d = %s not found in device tree!\n",
instance, cmd);
break;
if (fdtdec_get_alias_seq(gd->fdt_blob, "serial",
dev_of_offset(dev), &alias))
break;
sprintf(cmd, "%d", alias);
}
sprintf(cmd, "%d", dev_seq(dev));
env_set("boot_device", "serial");
env_set("boot_instance", cmd);
/* restore console on uart when not used */
if (gd->cur_serial_dev != dev) {
if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && gd->cur_serial_dev != dev) {
gd->flags &= ~(GD_FLG_SILENT |
GD_FLG_DISABLE_CONSOLE);
printf("serial boot with console enabled!\n");

9
board/st/common/stm32mp_dfu.c
View file

@ -143,7 +143,8 @@ void set_dfu_alt_info(char *interface, char *devstr)
board_get_alt_info_mtd(mtd, buf);
}
if (IS_ENABLED(CONFIG_DFU_VIRT)) {
if (IS_ENABLED(CONFIG_DFU_VIRT) &&
IS_ENABLED(CMD_STM32PROG_USB)) {
strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
@ -217,7 +218,7 @@ int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
return dfu_pmic_read(offset, buf, len);
}
if (CONFIG_IS_ENABLED(CMD_STM32PROG) &&
if (IS_ENABLED(CONFIG_CMD_STM32PROG_USB) &&
dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
return stm32prog_read_medium_virt(dfu, offset, buf, len);
@ -228,7 +229,7 @@ int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset,
void *buf, long *len)
{
if (CONFIG_IS_ENABLED(CMD_STM32PROG) &&
if (IS_ENABLED(CONFIG_CMD_STM32PROG_USB) &&
dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
return stm32prog_write_medium_virt(dfu, offset, buf, len);
@ -237,7 +238,7 @@ int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset,
int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
{
if (CONFIG_IS_ENABLED(CMD_STM32PROG) &&
if (IS_ENABLED(CONFIG_CMD_STM32PROG_USB) &&
dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
return stm32prog_get_medium_size_virt(dfu, size);

16
board/st/common/stm32mp_mtdparts.c
View file

@ -122,28 +122,24 @@ void board_mtdparts_default(const char **mtdids, const char **mtdparts)
log_debug("mtd device = %s\n", dev->name);
}
if (nor || nand) {
if (nand) {
mtd = get_mtd_device_nm("nand0");
if (!IS_ERR_OR_NULL(mtd)) {
const char *mtd_boot = CONFIG_MTDPARTS_NAND0_BOOT;
const char *mtd_tee = CONFIG_MTDPARTS_NAND0_TEE;
board_set_mtdparts("nand0", ids, parts,
!nor ? mtd_boot : NULL,
CONFIG_MTDPARTS_NAND0_BOOT,
!nor && tee ? mtd_tee : NULL,
"-(UBI)");
put_mtd_device(mtd);
}
}
if (nor || spinand) {
if (spinand) {
mtd = get_mtd_device_nm("spi-nand0");
if (!IS_ERR_OR_NULL(mtd)) {
const char *mtd_boot = CONFIG_MTDPARTS_SPINAND0_BOOT;
const char *mtd_tee = CONFIG_MTDPARTS_SPINAND0_TEE;
board_set_mtdparts("spi-nand0", ids, parts,
!nor ? mtd_boot : NULL,
CONFIG_MTDPARTS_SPINAND0_BOOT,
!nor && tee ? mtd_tee : NULL,
"-(UBI)");
put_mtd_device(mtd);
@ -152,11 +148,9 @@ void board_mtdparts_default(const char **mtdids, const char **mtdparts)
if (nor) {
if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) {
const char *mtd_boot = CONFIG_MTDPARTS_NOR0_BOOT;
const char *mtd_tee = CONFIG_MTDPARTS_NOR0_TEE;
board_set_mtdparts("nor0", ids, parts,
mtd_boot,
CONFIG_MTDPARTS_NOR0_BOOT,
tee ? mtd_tee : NULL,
"-(nor_user)");
}

5
board/st/stm32f429-discovery/stm32f429-discovery.c
View file

@ -51,11 +51,6 @@ u32 get_board_rev(void)
return 0;
}
int board_early_init_f(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

5
board/st/stm32f429-evaluation/stm32f429-evaluation.c
View file

@ -45,11 +45,6 @@ u32 get_board_rev(void)
return 0;
}
int board_early_init_f(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

5
board/st/stm32f469-discovery/stm32f469-discovery.c
View file

@ -45,11 +45,6 @@ u32 get_board_rev(void)
return 0;
}
int board_early_init_f(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

5
board/st/stm32f746-disco/stm32f746-disco.c
View file

@ -48,11 +48,6 @@ int dram_init_banksize(void)
return fdtdec_setup_memory_banksize();
}
int board_early_init_f(void)
{
return 0;
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)

10
board/st/stm32h743-disco/stm32h743-disco.c
View file

@ -36,21 +36,11 @@ int dram_init_banksize(void)
return 0;
}
int board_early_init_f(void)
{
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

10
board/st/stm32h743-eval/stm32h743-eval.c
View file

@ -36,21 +36,11 @@ int dram_init_banksize(void)
return 0;
}
int board_early_init_f(void)
{
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;

8
board/st/stm32mp1/stm32mp1.c
View file

@ -862,8 +862,14 @@ const char *env_ext4_get_dev_part(void)
int mmc_get_env_dev(void)
{
u32 bootmode = get_bootmode();
u32 bootmode;
if (CONFIG_SYS_MMC_ENV_DEV >= 0)
return CONFIG_SYS_MMC_ENV_DEV;
bootmode = get_bootmode();
/* use boot instance to select the correct mmc device identifier */
return (bootmode & TAMP_BOOT_INSTANCE_MASK) - 1;
}

1
configs/stm32f429-discovery_defconfig
View file

@ -14,7 +14,6 @@ CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "

1
configs/stm32f429-evaluation_defconfig
View file

@ -11,7 +11,6 @@ CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_IMLS=y

1
configs/stm32f469-discovery_defconfig
View file

@ -11,7 +11,6 @@ CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_IMLS=y

1
configs/stm32f746-disco_defconfig
View file

@ -18,7 +18,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_GPT=y

2
configs/stm32f769-disco_defconfig
View file

@ -18,8 +18,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set

2
configs/stm32h743-disco_defconfig
View file

@ -15,8 +15,6 @@ CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y

2
configs/stm32h743-eval_defconfig
View file

@ -15,8 +15,6 @@ CONFIG_AUTOBOOT_STOP_STR=" "
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y

2
configs/stm32mp15_basic_defconfig
View file

@ -20,6 +20,7 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SPL_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
@ -71,6 +72,7 @@ CONFIG_ENV_UBI_PART="UBI"
CONFIG_ENV_UBI_VOLUME="uboot_config"
CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=-1
# CONFIG_SPL_ENV_IS_NOWHERE is not set
# CONFIG_SPL_ENV_IS_IN_SPI_FLASH is not set
CONFIG_STM32_ADC=y

1
configs/stm32mp15_dhcom_basic_defconfig
View file

@ -19,6 +19,7 @@ CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its"
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y

1
configs/stm32mp15_dhcor_basic_defconfig
View file

@ -17,6 +17,7 @@ CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its"
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y

4
configs/stm32mp15_trusted_defconfig
View file

@ -13,6 +13,7 @@ CONFIG_ENV_OFFSET_REDUND=0x2C0000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_CMD_ADTIMG=y
@ -52,7 +53,9 @@ CONFIG_ENV_UBI_PART="UBI"
CONFIG_ENV_UBI_VOLUME="uboot_config"
CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=-1
CONFIG_STM32_ADC=y
CONFIG_CLK_SCMI=y
CONFIG_SET_DFU_ALT_INFO=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
@ -109,6 +112,7 @@ CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_REGULATOR_STM32_VREFBUF=y
CONFIG_DM_REGULATOR_STPMIC1=y
CONFIG_REMOTEPROC_STM32_COPRO=y
CONFIG_RESET_SCMI=y
CONFIG_DM_RNG=y
CONFIG_RNG_STM32MP1=y
CONFIG_DM_RTC=y

16
doc/board/st/stm32mp1.rst
View file

@ -237,7 +237,8 @@ Build Procedure
- For Basic boot
- FSBL = spl/u-boot-spl.stm32
- SSBL = u-boot.img
- SSBL = u-boot.img (without CONFIG_SPL_LOAD_FIT) or
u-boot.itb (with CONFIG_SPL_LOAD_FIT=y)
Switch Setting for Boot Mode
----------------------------
@ -347,7 +348,9 @@ c) copy the FSBL (2 times) and SSBL file on the correct partition.
# dd if=u-boot-spl.stm32 of=/dev/mmcblk0p1
# dd if=u-boot-spl.stm32 of=/dev/mmcblk0p2
# dd if=u-boot.img of=/dev/mmcblk0p3
# dd if=u-boot.img of=/dev/mmcblk0p3 # Without CONFIG_SPL_LOAD_FIT
OR
dd if=u-boot.itb of=/dev/mmcblk0p3 # With CONFIG_SPL_LOAD_FIT=y
for trusted boot mode: ::
@ -363,8 +366,9 @@ Prepare eMMC
You can use U-Boot to copy binary in eMMC.
In the next example, you need to boot from SD card and the images
(u-boot-spl.stm32, u-boot.img) are presents on SD card (mmc 0)
in ext4 partition 4 (bootfs).
(u-boot-spl.stm32, u-boot.img for systems without CONFIG_SPL_LOAD_FIT
or u-boot.itb for systems with CONFIG_SPL_LOAD_FIT=y) are presents on
SD card (mmc 0) in ext4 partition 4 (bootfs).
To boot from SD card, select BootPinMode = 1 0 1 and reset.
@ -387,7 +391,9 @@ b) copy SPL on eMMC on firts boot partition
c) copy U-Boot in first GPT partition of eMMC::
# ext4load mmc 0:4 0xC0000000 u-boo t.img
# ext4load mmc 0:4 0xC0000000 u-boot.img # Without CONFIG_SPL_LOAD_FIT
OR
ext4load mmc 0:4 0xC0000000 u-boot.itb # With CONFIG_SPL_LOAD_FIT=y
# mmc dev 1
# part start mmc 1 1 partstart
# mmc write ${fileaddr} ${partstart} ${filesize}

62
drivers/clk/clk_stm32mp1.c
View file

@ -250,7 +250,7 @@ DECLARE_GLOBAL_DATA_PTR;
enum stm32mp1_parent_id {
/*
* _HSI, _HSE, _CSI, _LSI, _LSE should not be moved
* they are used as index in osc[] as entry point
* they are used as index in osc_clk[] as clock reference
*/
_HSI,
_HSE,
@ -430,8 +430,7 @@ struct stm32mp1_clk_data {
struct stm32mp1_clk_priv {
fdt_addr_t base;
const struct stm32mp1_clk_data *data;
ulong osc[NB_OSC];
struct udevice *osc_dev[NB_OSC];
struct clk osc_clk[NB_OSC];
};
#define STM32MP1_CLK(off, b, idx, s) \
@ -790,7 +789,7 @@ static ulong stm32mp1_clk_get_fixed(struct stm32mp1_clk_priv *priv, int idx)
return 0;
}
return priv->osc[idx];
return clk_get_rate(&priv->osc_clk[idx]);
}
static int stm32mp1_clk_get_id(struct stm32mp1_clk_priv *priv, unsigned long id)
@ -1545,7 +1544,7 @@ static int stm32mp1_hsidiv(fdt_addr_t rcc, ulong hsifreq)
break;
if (hsidiv == 4) {
log_err("clk-hsi frequency invalid");
log_err("hsi frequency invalid");
return -1;
}
@ -1952,13 +1951,13 @@ static int stm32mp1_clktree(struct udevice *dev)
* switch ON oscillator found in device-tree,
* HSI already ON after bootrom
*/
if (priv->osc[_LSI])
if (clk_valid(&priv->osc_clk[_LSI]))
stm32mp1_lsi_set(rcc, 1);
if (priv->osc[_LSE]) {
if (clk_valid(&priv->osc_clk[_LSE])) {
int bypass, digbyp;
u32 lsedrv;
struct udevice *dev = priv->osc_dev[_LSE];
struct udevice *dev = priv->osc_clk[_LSE].dev;
bypass = dev_read_bool(dev, "st,bypass");
digbyp = dev_read_bool(dev, "st,digbypass");
@ -1969,9 +1968,9 @@ static int stm32mp1_clktree(struct udevice *dev)
stm32mp1_lse_enable(rcc, bypass, digbyp, lsedrv);
}
if (priv->osc[_HSE]) {
if (clk_valid(&priv->osc_clk[_HSE])) {
int bypass, digbyp, css;
struct udevice *dev = priv->osc_dev[_HSE];
struct udevice *dev = priv->osc_clk[_HSE].dev;
bypass = dev_read_bool(dev, "st,bypass");
digbyp = dev_read_bool(dev, "st,digbypass");
@ -1996,8 +1995,8 @@ static int stm32mp1_clktree(struct udevice *dev)
/* configure HSIDIV */
dev_dbg(dev, "configure HSIDIV\n");
if (priv->osc[_HSI]) {
stm32mp1_hsidiv(rcc, priv->osc[_HSI]);
if (clk_valid(&priv->osc_clk[_HSI])) {
stm32mp1_hsidiv(rcc, clk_get_rate(&priv->osc_clk[_HSI]));
stgen_config(priv);
}
@ -2043,7 +2042,7 @@ static int stm32mp1_clktree(struct udevice *dev)
}
/* wait LSE ready before to use it */
if (priv->osc[_LSE])
if (clk_valid(&priv->osc_clk[_LSE]))
stm32mp1_lse_wait(rcc);
/* configure with expected clock source */
@ -2082,7 +2081,7 @@ static int stm32mp1_clktree(struct udevice *dev)
dev_dbg(dev, "oscillator off\n");
/* switch OFF HSI if not found in device-tree */
if (!priv->osc[_HSI])
if (!clk_valid(&priv->osc_clk[_HSI]))
stm32mp1_hsi_set(rcc, 0);
/* Software Self-Refresh mode (SSR) during DDR initilialization */
@ -2178,40 +2177,25 @@ static ulong stm32mp1_clk_set_rate(struct clk *clk, unsigned long clk_rate)
return -EINVAL;
}
static void stm32mp1_osc_clk_init(const char *name,
struct stm32mp1_clk_priv *priv,
int index)
{
struct clk clk;
struct udevice *dev = NULL;
priv->osc[index] = 0;
clk.id = 0;
if (!uclass_get_device_by_name(UCLASS_CLK, name, &dev)) {
if (clk_request(dev, &clk))
log_err("%s request", name);
else
priv->osc[index] = clk_get_rate(&clk);
}
priv->osc_dev[index] = dev;
}
static void stm32mp1_osc_init(struct udevice *dev)
{
struct stm32mp1_clk_priv *priv = dev_get_priv(dev);
int i;
const char *name[NB_OSC] = {
[_LSI] = "clk-lsi",
[_LSE] = "clk-lse",
[_HSI] = "clk-hsi",
[_HSE] = "clk-hse",
[_CSI] = "clk-csi",
[_LSI] = "lsi",
[_LSE] = "lse",
[_HSI] = "hsi",
[_HSE] = "hse",
[_CSI] = "csi",
[_I2S_CKIN] = "i2s_ckin",
};
for (i = 0; i < NB_OSC; i++) {
stm32mp1_osc_clk_init(name[i], priv, i);
dev_dbg(dev, "%d: %s => %x\n", i, name[i], (u32)priv->osc[i]);
if (clk_get_by_name(dev, name[i], &priv->osc_clk[i]))
dev_dbg(dev, "No source clock \"%s\"", name[i]);
else
dev_dbg(dev, "%s clock rate: %luHz\n",
name[i], clk_get_rate(&priv->osc_clk[i]));
}
}

4
drivers/firmware/scmi/mailbox_agent.c
View file

@ -3,13 +3,15 @@
* Copyright (C) 2020 Linaro Limited.
*/
#define LOG_CATEGORY UCLASS_SCMI_AGENT
#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <errno.h>
#include <mailbox.h>
#include <scmi_agent.h>
#include <scmi_agent-uclass.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
#include <linux/compat.h>

2
drivers/firmware/scmi/sandbox-scmi_agent.c
View file

@ -3,6 +3,8 @@
* Copyright (C) 2020, Linaro Limited
*/
#define LOG_CATEGORY UCLASS_SCMI_AGENT
#include <common.h>
#include <dm.h>
#include <malloc.h>

2
drivers/firmware/scmi/sandbox-scmi_devices.c
View file

@ -3,6 +3,8 @@
* Copyright (C) 2020, Linaro Limited
*/
#define LOG_CATEGORY UCLASS_MISC
#include <common.h>
#include <clk.h>
#include <dm.h>

5
drivers/firmware/scmi/scmi_agent-uclass.c
View file

@ -3,13 +3,14 @@
* Copyright (C) 2020 Linaro Limited.
*/
#define LOG_CATEGORY UCLASS_SCMI_AGENT
#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <errno.h>
#include <scmi_agent-uclass.h>
#include <scmi_protocols.h>
#include <dm/device_compat.h>
#include <dm/device-internal.h>
#include <linux/compat.h>

3
drivers/firmware/scmi/smccc_agent.c
View file

@ -3,12 +3,15 @@
* Copyright (C) 2020 Linaro Limited.
*/
#define LOG_CATEGORY UCLASS_SCMI_AGENT
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <scmi_agent.h>
#include <scmi_agent-uclass.h>
#include <dm/devres.h>
#include <dm/device_compat.h>
#include <dm/device-internal.h>
#include <linux/arm-smccc.h>
#include <linux/compat.h>

2
drivers/firmware/scmi/smt.c
View file

@ -4,6 +4,8 @@
* Copyright (C) 2019-2020 Linaro Limited.
*/
#define LOG_CATEGORY UCLASS_SCMI_AGENT
#include <common.h>
#include <cpu_func.h>
#include <dm.h>

2
drivers/mtd/nand/core.c
View file

@ -10,6 +10,7 @@
#define pr_fmt(fmt) "nand: " fmt
#include <common.h>
#include <watchdog.h>
#ifndef __UBOOT__
#include <linux/compat.h>
#include <linux/module.h>
@ -172,6 +173,7 @@ int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo)
nanddev_offs_to_pos(nand, einfo->addr, &pos);
nanddev_offs_to_pos(nand, einfo->addr + einfo->len - 1, &last);
while (nanddev_pos_cmp(&pos, &last) <= 0) {
WATCHDOG_RESET();
ret = nanddev_erase(nand, &pos);
if (ret) {
einfo->fail_addr = nanddev_pos_to_offs(nand, &pos);

3
drivers/mtd/nand/spi/core.c
View file

@ -22,6 +22,7 @@
#else
#include <common.h>
#include <errno.h>
#include <watchdog.h>
#include <spi.h>
#include <spi-mem.h>
#include <dm/device_compat.h>
@ -578,6 +579,7 @@ static int spinand_mtd_read(struct mtd_info *mtd, loff_t from,
#endif
nanddev_io_for_each_page(nand, from, ops, &iter) {
WATCHDOG_RESET();
ret = spinand_select_target(spinand, iter.req.pos.target);
if (ret)
break;
@ -629,6 +631,7 @@ static int spinand_mtd_write(struct mtd_info *mtd, loff_t to,
#endif
nanddev_io_for_each_page(nand, to, ops, &iter) {
WATCHDOG_RESET();
ret = spinand_select_target(spinand, iter.req.pos.target);
if (ret)
break;

3
drivers/mtd/spi/spi-nor-core.c
View file

@ -11,6 +11,7 @@
#include <common.h>
#include <log.h>
#include <watchdog.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
@ -566,6 +567,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
len = instr->len;
while (len) {
WATCHDOG_RESET();
#ifdef CONFIG_SPI_FLASH_BAR
ret = write_bar(nor, addr);
if (ret < 0)
@ -1250,6 +1252,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
for (i = 0; i < len; ) {
ssize_t written;
loff_t addr = to + i;
WATCHDOG_RESET();
/*
* If page_size is a power of two, the offset can be quickly

2
drivers/spi/stm32_qspi.c
View file

@ -16,6 +16,7 @@
#include <reset.h>
#include <spi.h>
#include <spi-mem.h>
#include <watchdog.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
#include <linux/delay.h>
@ -171,6 +172,7 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv *priv,
static void _stm32_qspi_read_fifo(u8 *val, void __iomem *addr)
{
*val = readb(addr);
WATCHDOG_RESET();
}
static void _stm32_qspi_write_fifo(u8 *val, void __iomem *addr)

9
drivers/video/dw_mipi_dsi.c
View file

@ -721,15 +721,15 @@ static void dw_mipi_dsi_dphy_enable(struct dw_mipi_dsi *dsi)
ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val,
val & PHY_LOCK, PHY_STATUS_TIMEOUT_US);
if (ret)
dev_warn(dsi->dsi_host.dev,
"failed to wait phy lock state\n");
dev_dbg(dsi->dsi_host.dev,
"failed to wait phy lock state\n");
ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
val, val & PHY_STOP_STATE_CLK_LANE,
PHY_STATUS_TIMEOUT_US);
if (ret)
dev_warn(dsi->dsi_host.dev,
"failed to wait phy clk lane stop state\n");
dev_dbg(dsi->dsi_host.dev,
"failed to wait phy clk lane stop state\n");
}
static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
@ -797,6 +797,7 @@ static int dw_mipi_dsi_init(struct udevice *dev,
dsi->phy_ops = phy_ops;
dsi->max_data_lanes = max_data_lanes;
dsi->device = device;
dsi->dsi_host.dev = (struct device *)dev;
dsi->dsi_host.ops = &dw_mipi_dsi_host_ops;
device->host = &dsi->dsi_host;

3
drivers/video/stm32/stm32_dsi.c
View file

@ -483,6 +483,9 @@ static int stm32_dsi_probe(struct udevice *dev)
if (priv->hw_version != HWVER_130 &&
priv->hw_version != HWVER_131) {
dev_err(dev, "DSI version 0x%x not supported\n", priv->hw_version);
dev_dbg(dev, "remove and unbind all DSI child\n");
device_chld_remove(dev, NULL, DM_REMOVE_NORMAL);
device_chld_unbind(dev, NULL);
ret = -ENODEV;
goto err_clk;
}

1
include/configs/stm32mp1.h
View file

@ -160,7 +160,6 @@
* and the ramdisk at the end.
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootdelay=1\0" \
"kernel_addr_r=0xc2000000\0" \
"fdt_addr_r=0xc4000000\0" \
"scriptaddr=0xc4100000\0" \