Since busses are sorted in alphabetical order, introducing more
than nine busses led to unexpected behaviour.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Bus has to be held for repeated start regardless of
read/write access.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
Reinhard Pfau complained that macros in ihs_i2c do not follow best practices.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Heiko Schocher <hs@denx.de>
Fix below warnings happening for xilinx_zynqmp_ep_defconfig
drivers/net/zynq_gem.c: In function ‘zynq_gem_init’:
drivers/net/zynq_gem.c:330:7: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
((u32)(priv->rxbuffers) +
^
In file included from drivers/net/zynq_gem.c:19:0:
drivers/net/zynq_gem.c:336:10: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
writel((u32)priv->rx_bd, ®s->rxqbase);
^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
^
drivers/net/zynq_gem.c: In function ‘zynq_gem_send’:
drivers/net/zynq_gem.c:399:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
writel((u32)priv->tx_bd, ®s->txqbase);
^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
^
drivers/net/zynq_gem.c:404:22: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
priv->tx_bd->addr = (u32)ptr;
^
drivers/net/zynq_gem.c:409:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
addr = (u32) ptr;
^
drivers/net/zynq_gem.c:414:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
addr = (u32)priv->rxbuffers;
^
drivers/net/zynq_gem.c: In function ‘zynq_gem_recv’:
drivers/net/zynq_gem.c:454:31: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
net_process_received_packet((u8 *)addr, frame_len);
^
drivers/net/zynq_gem.c: In function ‘zynq_gem_initialize’:
drivers/net/zynq_gem.c:533:35: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE);
^
drivers/net/zynq_gem.c:533:16: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
priv->rx_bd = (struct emac_bd *)((u32)bd_space + BD_SEPRN_SPACE);
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Fix below compilation warings happening for hikey_defconfig
drivers/usb/eth/smsc95xx.c:698:56: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
^
include/common.h:109:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
^
drivers/usb/eth/smsc95xx.c:698:2: note: in expansion of macro ‘debug’
debug("** %s(), len %d, buf %#x\n", __func__, length, (int)msg);
^
drivers/usb/eth/smsc95xx.c:718:2: warning: format ‘%u’ expects argument of
type ‘unsigned int’, but argument 2 has type ‘long unsigned int’ [-Wformat=]
debug("Tx: len = %u, actual = %u, err = %d\n",
^
drivers/usb/eth/smsc95xx.c: In function ‘smsc95xx_recv’:
drivers/usb/eth/smsc95xx.c:802:19: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
cur_buf_align = (int)buf_ptr - (int)recv_buf;
^
drivers/usb/eth/smsc95xx.c:802:34: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
cur_buf_align = (int)buf_ptr - (int)recv_buf;
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Fix below compilation warings happening for hikey_defconfig
drivers/mmc/dw_mmc.c: In function ‘dwmci_set_idma_desc’:
drivers/mmc/dw_mmc.c:43:20: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac);
^
drivers/mmc/dw_mmc.c: In function ‘dwmci_prepare_data’:
drivers/mmc/dw_mmc.c:61:35: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac);
^
drivers/mmc/dw_mmc.c:73:9: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
(u32)bounce_buffer + (i * PAGE_SIZE));
^
CC drivers/mmc/hi6220_dw_mmc.o
drivers/mmc/hi6220_dw_mmc.c: In function ‘hi6220_dwmci_add_port’:
drivers/mmc/hi6220_dw_mmc.c:51:17: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
host->ioaddr = (void *)regbase;
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
When converting between PCI bus and phys addresses, a two pass search
was introduced with preference to non-PCI_REGION_SYS_MEMORY regions.
See commit 2d43e873a2.
However, since PCI_REGION_MEM is defined as 0, the if statement was
always asserted true: ((flags & PCI_REGION_MEM) == PCI_REGION_MEM)
This patch uses PCI_REGION_TYPE bit to check if the region is
PCI_REGION_MEM: ((flags & PCI_REGION_TYPE) == PCI_REGION_MEM)
Signed-off-by: Cheng Gu <chenggu@marvell.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
So far the fastboot code was only supporting MMC-backed devices for its
flashing operations (flash and erase).
Add a storage backend for NAND-backed devices.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The fastboot flash command that writes an image to a partition works in
several steps:
1 - Retrieve the maximum size the device can download through the
"max-download-size" variable
2 - Retrieve the partition type through the "partition-type:%s" variable,
that indicates whether or not the partition needs to be erased (even
though the fastboot client has minimal support for that)
3a - If the image is smaller than what the device can handle, send the image
and flash it.
3b - If the image is larger than what the device can handle, create a
sparse image, and split it in several chunks that would fit. Send the
chunk, flash it, repeat until we have no more data to send.
However, in the 3b case, the subsequent transfers have no particular
identifiers, the protocol just assumes that you would resume the writes
where you left it.
While doing so works well, it also means that flashing two subsequent
images on the same partition (for example because the user made a mistake)
would not work withouth flashing another partition or rebooting the board,
which is not really intuitive.
Since we have always the same pattern, we can however maintain a counter
that will be reset every time the client will retrieve max-download-size,
and incremented after each buffer will be flashed, that will allow us to
tell whether we should simply resume the flashing where we were, or start
back at the beginning of the partition.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The functions and a few define to generate a fastboot message to be sent
back to the host were so far duplicated among the users.
Move them all to a common place.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The current error message in get_part if CONFIG_MTDPARTS is disabled is
"offset is not a number" which is confusing and doesn't help at all.
Change that for something that might give a hint on what's going on.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Introudce a new function lcdif_power_down.
1. Waits for a VSYNC interrupt to guarantee the reset is done at the
VSYNC edge, which somehow makes the LCDIF consume the display FIFO(?)
and helps the LCDIF work normally at the kernel stage.
2. Add power down function to stop lcdif.
The reason to introduce lcdif_power_down is that we want lcdif to be in
initial state when doing uboot reset or before kernel boot to make
system stable, otherwise system may hang.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Change mxs_set_lcdclk prototype to add a new parameter
base_addr. There are two LCD interfaces for i.MX6SX,
we may support LCDIF1 or LCDIF2.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This is the normal Tegra SPI driver modified to work with the
QSPI controller in Tegra210. It does not do 2x/4x transfers
or any other QSPI protocol.
Signed-off-by: Yen Lin <yelin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
This needs a separate compatible value from Tegra124 since the new HW
version has bugs that would prevent a driver for previous HW versions
from operating at all.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The board PCI setup code may control regulators that are required simply
to bring up the PCI controller itself (or PLLs, IOs, ... it uses). Move
the call to this function earlier so that all board-provided resources
are ready early enough for everything to work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tegra210's PCIe controller has a bug that requires the PCA (performance
counter) feature to be enabled. If this isn't done, accesses to device
configuration space will hang the chip for tens of seconds. Implement
the workaround.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The number of cells used by each entry in the DT ranges property is
determined by the #address-cells/#size-cells properties. Fix the code
to respect this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tegra peripherals can generally access a 32-bit physical address space,
and I believe this applies to PCIe. Clip the PCI region that refers to
DRAM so it fits into 32-bits to avoid issues.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The Modular Scatter-Gather DMA core is a new DMA core to work
with the Altera Triple-Speed Ethernet MegaCore. It replaces the
legacy Scatter-Gather Direct Memory Access (SG-DMA) controller
core. Please find details on the "Embedded Peripherals IP User
Guide" of Altera.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Add priv ops to prepare msgdma support. These ops are dma type
specific.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Move the sgdma wait from free_pkt to recv. This is the proper
place to wait recv sgdma done.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Add Altera Generic Quad SPI Controller support. The controller
converts SPI NOR flash to parallel flash interface. So it is
not like other SPI flash, but rather like CFI flash.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Implement a Memory Technology Device (MTD) uclass. It should
include most flash drivers in the future. Though no uclass ops
are defined yet, the MTD ops could be used.
The NAND flash driver is based on MTD. The CFI flash and SPI
flash support MTD, too. It should make sense to convert them
to MTD uclass.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one. This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.
Cc: Kate Stewart <kstewart@linuxfoundation.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Get numbers of fdt address and size cells in altera_tse_probe(),
thereby remove the assumption of one address cell and one size
cell.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Replace numerical bit shift with BIT macro
in altera_tse
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Remove the useless parenthesis.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Use data type u32/u16/u8 for regs and desc, as it is more
portable.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Remove unused macro and regs def.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Follow commit 97b0597302 ("debug_uart: Adjust the declaration of
debug_uart_init()")
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Follow commit 97b0597302 ("debug_uart: Adjust the declaration of
debug_uart_init()")
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
- Moved macro definitions to top
- Remove the penultimate comma in of_match ids
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in altera_timer
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
- Moved macro definitions to top
- Re-arrange header includes ascending order
- Remove unused header linux/compiler.h
- Remove the penultimate comma in of_match ids
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in altera_uart
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
- Moved macro definitions to top
- Give spaces around the '>>' in ALTERA_JTAG_WSPACE()
- Re-arrange header includes ascending order
- Remove unused header linux/compiler.h
- Remove the penultimate comma in of_match ids
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in altera_jtag_uart
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the
status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations,
making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB
=> sf protect lock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
offset 0x3f0000 is protected and cannot be erased
SF: 65536 bytes @ 0x3f0000 Erased: ERROR
=> sf protect unlock 0x3f0000 0x10000
=> sf erase 0x3f0000 0x10000
SF: 65536 bytes @ 0x3f0000 Erased: OK
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
[re-worked to fit the lock common to dm and non-dm]
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Add the SPI NOR protection mechanism from the kernel.
This code is based on the work from
Brian Norris <computersforpeace@gmail.com>
Here is the commit details:
"mtd: spi-nor: refactor block protection functions"
(sha1: 62593cf40b23b523b9fc9334ca61ba6c595ebb09)
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Use the is_power_of_2() definition from log2.h to align with the
kernel implementation.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Ensure the intended SCLK frequency not exceeding the maximum
frequency. If that happen, SCLK will set to maximum frequency.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Fix the fdt read for spi-max-frequency as it's contained
in the child node. Current state of code is always
returning default value.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Ensuring spi_calibration is run when there is a change of sclk
frequency. This will ensure the qspi flash access works for high
sclk frequency
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
The code is from Adrian Cox, and is patterned after similar
support in Linux (drivers/rtc/rtc-ds1307.c:1121-1135). This
chip is used on the Cyrus board from Varisys.
Signed-off-by: Andy Fleming <afleming@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Update this driver to use driver model and change all users.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Since we use device tree in SPL also, we can drop this code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for the debug UART to assist with early debugging. Enable it
for Zybo as an example.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sometimes stdout-path contains a UART alias along with speed, etc. For
example:
stdout-path = "serial0:115200n8";
Add support for decoding this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Cast u32 bit value to 64bit before recasting to 64bit pointer to avoid
pointer from integer cast size mismatch warnings.
Warning log:
+../drivers/usb/gadget/udc/udc-core.c: In function
‘usb_gadget_unmap_request’:
+../drivers/usb/gadget/udc/udc-core.c:68:19: warning: cast to pointer
from integer of different size [-Wint-to-pointer-cast]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch removes this warning:
CC drivers/usb/gadget/f_thor.o
drivers/usb/gadget/f_thor.c: In function ‘thor_tx_data’:
drivers/usb/gadget/f_thor.c:572:2: warning: format ‘%d’ expects argument
of type ‘int’, but argument 4 has type ‘long unsigned int’ [-Wformat=]
debug("%s: dev->in_req->length:%d to_cpy:%d\n", __func__,
^
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
parse_dev() alters the string pointed by devstr parameter. Due to this
subsequent parsing of sf entities will fail, as string pointed by devstr
is no longer valid sf dev arguments.
Fix this by passing pointer to the copy of the string to parse_dev
instead of pointer to the actual devstr.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
We need to cache-flush the hcca area after the initial memset, otherwise
on the first hc_interrupt we might see an old $random value as done_head and
try to interpret that as the address for a completed td (followed by chaos).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia
Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO
V3.0 specification. It is compliant with the SD Host Controller Standard
V3.0 specification.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
According to the SDHC specification, stopping the SD Clock is by setting
the SD Clock Enable bit in the Clock Control register at 0, instead of
setting all bits at 0.
Before stopping the SD clock, we need to make sure all SD transactions
to complete, so add checking the CMD and DAT bits in the Presen State
register, before stopping the SD clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card),
enable EVDD automatic control via SDHC_VS. This could support SD card
IO voltage switching for UHS-1 speed mode.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
If adapter card type identification is supported for platform, we would
enable dat[4:7] for eMMC4.5 Adapter Card.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
commit b8e5b07225 "Powerpc: eSDHC: Fix mmc read write err in uboot of
T4240QDS board", T4160 also needs this fix.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The SD card detection depends on checking one pin state.
But the pin was configured after card was detected, which is wrong.
This commit fixes this, by moving call to pinmux before use the pin.
Tested-on: Odroid U3 and Odroid X2.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit adds implementation of Sandbox ADC device emulation.
The device provides:
- single and multi-channel conversion
- 4 channels with predefined conversion output data
- 16-bit resolution
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit adds driver for Exynos54xx ADC subsystem.
The driver is implemented using driver model, amd provides
ADC uclass's methods for ADC single channel operations:
- adc_start_channel()
- adc_channel_data()
- adc_stop()
The basic parameters of ADC conversion, are:
- sample rate: 600KSPS
- output the data as average of 8 time conversion
ADC features:
- sample rate: 600KSPS
- resolution: 12-bit
- channels: 10 (analog multiplexer)
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit adds:
- new uclass id: UCLASS_ADC
- new uclass driver: drivers/adc/adc-uclass.c
The new uclass's API allows for ADC operation on:
* single-channel with channel selection by a number
* multti-channel with channel selection by bit mask
ADC uclass's functions:
* single-channel:
- adc_start_channel() - start channel conversion
- adc_channel_data() - get conversion data
- adc_channel_single_shot() - start/get conversion data
* multi-channel:
- adc_start_channels() - start selected channels conversion
- adc_channels_data() - get conversion data
- adc_channels_single_shot() - start/get conversion data for channels
selected by bit mask
* general:
- adc_stop() - stop the conversion
- adc_vdd_value() - positive reference Voltage value with polarity [uV]
- adc_vss_value() - negative reference Voltage value with polarity [uV]
- adc_data_mask() - conversion data bit mask
The device tree can provide below constraints/properties:
- vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1)
- vss-polarity-negative: if true: Vss = vss-microvolts * (-1)
- vdd-supply: phandle to Vdd regulator's node
- vss-supply: phandle to Vss regulator's node
And optional, checked only if the above corresponding, doesn't exist:
- vdd-microvolts: positive reference Voltage [uV]
- vss-microvolts: negative reference Voltage [uV]
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Some devices are supplied by configurable regulator's output.
But there was no function for getting it. This commit adds
function, that allows for getting the supply device by it's phandle.
The returned regulator device can be used with regulator uclass's API.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This driver allows I/O operations on the Samsung S2MPS11 PMIC,
which provides lots of LDO/BUCK outputs.
To enable it, update defconfig with:
- CONFIG_PMIC_S2MPS11
and additional, if were not defined:
- CONFIG_CMD_PMIC
- CONFIG_ERRNO_STR
The binding info: doc/device-tree-bindings/pmic/s2mps11.txt
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add 32bpp framebuffer support for the Atmel HLCDC driver. This is
needed for output bpp higher than 16bpp.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Global variables are bad. Get rid of this particular one, so we can
correctly instantiate multiple atmel mci interfaces, without having
them interfere with one another.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Instead of passing just the register area as a private data, introduce
a proper struct atmel_mci_priv structure instead. This will become useful
in the subsequent patch, where we eliminate the global variable from this
driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fix free()]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
After silencing the prints which were generated when reconfiguring the
clock of the SD/MMC bus, surprisingly, the driver stopped working such
that every attempt to use the SD/MMC bus caused the CPU to get totally
stuck hard. It turns out that the prints generated a short delay, which
was necessary for the CPU to reconfigure the clock without getting stuck.
Thus, this patch adds a short delay after the clock configuration instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
This driver generates clearly debugging prints when changing clock
speed, so silence those. Furthermore, the driver generates further
prints in case a command fails to complete. The later case woud be
useful, but for eMMC, command 8 can fail and it's not an error but
a part of the specification. Thus, make this debug() as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fix checkpatch warnings]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
SR_IE(Self-refresh interrupt enable) is needed for
Hardware Based Self-Refresh. Make it configurable and let
board code handle the rest.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Reviewed-by: York Sun <yorksun@freescale.com>
dev->uclass->uc_drv->per_device_auto_alloc_size is to be freed in
device_free(), so is dev->seq. Remove these unnecessary codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
In pch_gbe_probe(), some additional resources are allocated
(eg: mdio, phy). We should free these in the driver remove phase.
Add pch_gbe_remove() to clean it up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In designware_eth_probe(), some additional resources are allocated
(eg: mdio, phy). We should free these in the driver remove phase.
Add designware_eth_remove() to clean it up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
In phy_connect_dev(), if the phy device has an accociated mac device
before, a warning message will be printed. But we should test the
old device against the new one, if they are actually the same one,
don't print the warning message.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In get_phy_device_by_mask(), when no phy is found, currently we only
print a message to show the first phy address that is not found. But
this is not always the case as multiple phys can be specified by
phy_mask. Change to print all phys that are not found, and to reduce
the console boot log, change to use 'debug' instead of 'printf'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In get_phy_device_by_mask(), when no phy is found, we should not
create any phy device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
NAND-tree is used to check wiring between MAC and PHY using NAND gates
on the PHY side, hence the name.
NAND-tree initial status is latched at reset by probing the IRQ pin.
However some devices are sharing the PHY IRQ pin with other peripherals
such as Atmel SAMA5D[34]x-EK boards when using the optional TM7000
display module, therefore they are switching the PHY in NAND-tree test
mode depending on the current IRQ line status at reset.
This patch ensure PHY is not in NAND-tree test mode only for the Micrel
KSZ8051 PHY used by Atmel. There are other Micrel PHY affected but I
doubt they are used on such weird hardware design.
Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Casting from dev->priv to pci_dev_t changes the value's size on a 64-bit
system. This causes the compiler to complain about casting a pointer to an
integer of a different (smaller) size. To avoid this, cast to an integer
of matching size first, then perform an int->int cast to perform the size
change. This signals explicitly that we do want to change the size, and
avoids the compiler warning. This is legitimate since we know the pointer
actually stores a small integer, not a pointer value.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
